Akash Levy
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44e7316da1
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Add {`instance`, `cell`, `verilog_src`, `pin`, `net`, `hier_pins`, `capacitance`} fields to `report_checks -format json` for paths (#135)
* Add {`inst`, `cell`, `src`, `nets`} to `report_checks -format json`
* Smallfix
* Improved nets
* Race condition fix
* Fixes
* Small whitespace fix
* Add no paths corner case stuff
* Adjustments to naming of fields
* Requested fixes
* Reintroduce escapeBackslashes, use stringCopy to prevent stack memory warning
* Fix escapeBackslashes to use preferred style
* No backslash escaping
* Make requested fixes
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2025-01-13 19:28:04 -08:00 |