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write_timing_model unclocked register seg fault 

Signed-off-by: James Cherry <cherry@parallaxsw.com>
This commit is contained in:
James Cherry 2023-10-17 14:29:38 -07:00
parent 8f5216dc13
commit fa65070682
1 changed files with 10 additions and 8 deletions
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2
search/ClkSkew.cc
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@ -370,6 +370,7 @@ ClkSkews::findClkDelays(const Clock *clk,
while (path_iter.hasNext()) { while (path_iter.hasNext()) {
PathVertex *path = path_iter.next(); PathVertex *path = path_iter.next();
const ClockEdge *path_clk_edge = path->clkEdge(this); const ClockEdge *path_clk_edge = path->clkEdge(this);
if (path_clk_edge) {
const RiseFall *clk_rf = path_clk_edge->transition(); const RiseFall *clk_rf = path_clk_edge->transition();
const Clock *path_clk = path_clk_edge->clock(); const Clock *path_clk = path_clk_edge->clock();
if (path_clk == clk) { if (path_clk == clk) {
@ -381,6 +382,7 @@ ClkSkews::findClkDelays(const Clock *clk,
} }
} }
} }
}
} }
} // namespace } // namespace