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make same as upstream 

Signed-off-by: dsengupta0628 <dsengupta@precisioninno.com>
This commit is contained in:
dsengupta0628 2026-08-12 19:28:15 +00:00
parent 4c3c017f7a
commit e8af2e8ad9
1 changed files with 6 additions and 10 deletions
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16
dcalc/PrimaDelayCalc.cc
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@ -590,16 +590,12 @@ PrimaDelayCalc::stampEqns()
C_.setZero(); C_.setZero();
B_.setZero(); B_.setZero();
// The stamps below insert into G_/C_ in parasitic traversal order, which is // The stamps below do not visit the nodes in index order. Reserve room in
// unrelated to the node indices assigned by findNodeCount(). coeffRef() on a // each column so an out of order coeffRef() insert does not shift the packed
// packed sparse column has no free slot for an out of order insert, so it // array to make room, which makes stamping quadratic in the node count.
// shifts the remaining values over, making stampEqns() quadratic in the node constexpr int non_zero_entry_count = 8;
// count. Reserving slack per column gives the inserts somewhere to land. G_.reserve(Eigen::VectorXi::Constant(order_, non_zero_entry_count));
// Node degree in an RC network is small; stamp_slack covers the diagonal, the C_.reserve(Eigen::VectorXi::Constant(order_, non_zero_entry_count));
// resistor and coupling capacitor off diagonals and the driver row.
constexpr int stamp_slack = 8;
G_.reserve(Eigen::VectorXi::Constant(order_, stamp_slack));
C_.reserve(Eigen::VectorXi::Constant(order_, stamp_slack));
NetSet drvr_nets(network_); NetSet drvr_nets(network_);
for (ArcDcalcArg &dcalc_arg : *dcalc_args_) { for (ArcDcalcArg &dcalc_arg : *dcalc_args_) {