All path groups (#215)

* All path groups

* Fixes

* Use c++17 iteration
This commit is contained in:
Akash Levy
2025-02-12 10:40:43 -08:00
committed by GitHub
parent 20178bc924
commit e7e80ca6c2
5 changed files with 30 additions and 0 deletions
+2
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@@ -0,0 +1,2 @@
Initial path groups:
Final path groups: In2Out In2Reg Reg2Out Reg2Reg
+14
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@@ -0,0 +1,14 @@
# path_group_names
read_liberty asap7_small.lib.gz
read_verilog reg1_asap7.v
link_design top
create_clock -name clk -period 500 {clk1 clk2 clk3}
set_input_delay -clock clk 0 [all_inputs -no_clocks]
set_output_delay -clock clk 0 [all_outputs]
puts "Initial path groups: [sta::path_group_names]"
group_path -name In2Reg -from [all_inputs] -to [all_registers -data_pins]
group_path -name In2Out -from [all_inputs] -to [all_outputs]
group_path -name Reg2Out -from [all_registers -clock_pins] -to [all_outputs]
group_path -name Reg2Reg -from [all_registers -clock_pins] -to [all_registers -data_pins]
puts "Final path groups: [sta::path_group_names]"
+1
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@@ -147,6 +147,7 @@ record_sta_tests {
liberty_arcs_one2one_2
liberty_ccsn
liberty_latch3
path_group_names
prima3
report_checks_src_attr
report_json1