write_timing_model leak
Signed-off-by: James Cherry <cherry@parallaxsw.com>
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@ -209,6 +209,7 @@ MakeTimingModel::makePorts()
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float load_cap = graph_delay_calc_->loadCap(pin, dcalc_ap);
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float load_cap = graph_delay_calc_->loadCap(pin, dcalc_ap);
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lib_bit_port->setCapacitance(load_cap);
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lib_bit_port->setCapacitance(load_cap);
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}
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}
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delete member_iter;
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}
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}
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else {
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else {
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LibertyPort *lib_port = lib_builder_->makePort(cell_, port_name);
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LibertyPort *lib_port = lib_builder_->makePort(cell_, port_name);
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