write_path_spice rspf
Signed-off-by: James Cherry <cherry@parallaxsw.com>
This commit is contained in:
James Cherry
parent
d6aaff86e7
commit
db7da0afc4
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@ -98,6 +98,12 @@ private:
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const Clock *clk,
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DcalcAPIndex dcalc_ap_index);
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void writeStageParasitics(Stage stage);
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void writeStageParasiticNetwork(Pin *drvr_pin,
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Parasitic *parasitic,
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ParasiticAnalysisPt *parasitic_ap);
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void writeStagePiElmore(Pin *drvr_pin,
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Parasitic *parasitic);
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void writeNullParasitics(Pin *drvr_pin);
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void writeSubckts();
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StdStringSet findPathCellnames();
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void findPathCellSubckts(StdStringSet &path_cell_names);
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@ -1337,60 +1343,77 @@ WritePathSpice::writeStageParasitics(Stage stage)
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{
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PathRef *drvr_path = stageDrvrPath(stage);
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Pin *drvr_pin = stageDrvrPin(stage);
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Net *net = network_->net(drvr_pin);
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const char *net_name = net ? network_->pathName(net) : network_->pathName(drvr_pin);
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initNodeMap(net_name);
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streamPrint(spice_stream_, "* Net %s\n", net_name);
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DcalcAnalysisPt *dcalc_ap = drvr_path->dcalcAnalysisPt(this);
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ParasiticAnalysisPt *parasitic_ap = dcalc_ap->parasiticAnalysisPt();
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Parasitic *parasitic = parasitics_->findParasiticNetwork(drvr_pin, parasitic_ap);
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if (parasitic)
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writeStageParasiticNetwork(drvr_pin, parasitic, parasitic_ap);
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else {
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const RiseFall *drvr_rf = drvr_path->transition(this);
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parasitic = parasitics_->findPiElmore(drvr_pin, drvr_rf, parasitic_ap);
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if (parasitic)
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writeStagePiElmore(drvr_pin, parasitic);
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else {
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streamPrint(spice_stream_, "* No parasitics found for this net.\n");
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writeNullParasitics(drvr_pin);
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}
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}
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}
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void
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WritePathSpice::writeStageParasiticNetwork(Pin *drvr_pin,
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Parasitic *parasitic,
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ParasiticAnalysisPt *parasitic_ap)
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{
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Set<const Pin*> reachable_pins;
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int res_index = 1;
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int cap_index = 1;
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if (parasitic) {
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Net *net = network_->net(drvr_pin);
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const char *net_name = net ? network_->pathName(net) : network_->pathName(drvr_pin);
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initNodeMap(net_name);
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streamPrint(spice_stream_, "* Net %s\n", net_name);
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// Sort devices for consistent regression results.
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Vector<ParasiticDevice*> devices;
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ParasiticDeviceIterator *device_iter1 = parasitics_->deviceIterator(parasitic);
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while (device_iter1->hasNext()) {
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ParasiticDevice *device = device_iter1->next();
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devices.push_back(device);
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// Sort devices for consistent regression results.
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Vector<ParasiticDevice*> devices;
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ParasiticDeviceIterator *device_iter1 = parasitics_->deviceIterator(parasitic);
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while (device_iter1->hasNext()) {
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ParasiticDevice *device = device_iter1->next();
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devices.push_back(device);
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}
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delete device_iter1;
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sort(devices, ParasiticDeviceLess(parasitics_));
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for (ParasiticDevice *device : devices) {
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float resistance = parasitics_->value(device, parasitic_ap);
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if (parasitics_->isResistor(device)) {
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ParasiticNode *node1 = parasitics_->node1(device);
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ParasiticNode *node2 = parasitics_->node2(device);
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streamPrint(spice_stream_, "R%d %s %s %.3e\n",
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res_index,
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nodeName(node1),
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nodeName(node2),
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resistance);
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res_index++;
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const Pin *pin1 = parasitics_->connectionPin(node1);
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reachable_pins.insert(pin1);
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const Pin *pin2 = parasitics_->connectionPin(node2);
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reachable_pins.insert(pin2);
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}
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delete device_iter1;
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sort(devices, ParasiticDeviceLess(parasitics_));
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for (ParasiticDevice *device : devices) {
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float resistance = parasitics_->value(device, parasitic_ap);
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if (parasitics_->isResistor(device)) {
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ParasiticNode *node1 = parasitics_->node1(device);
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ParasiticNode *node2 = parasitics_->node2(device);
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streamPrint(spice_stream_, "R%d %s %s %.3e\n",
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res_index,
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nodeName(node1),
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nodeName(node2),
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resistance);
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res_index++;
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const Pin *pin1 = parasitics_->connectionPin(node1);
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reachable_pins.insert(pin1);
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const Pin *pin2 = parasitics_->connectionPin(node2);
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reachable_pins.insert(pin2);
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}
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else if (parasitics_->isCouplingCap(device)) {
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// Ground coupling caps for now.
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ParasiticNode *node1 = parasitics_->node1(device);
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float cap = parasitics_->value(device, parasitic_ap);
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streamPrint(spice_stream_, "C%d %s 0 %.3e\n",
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cap_index,
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nodeName(node1),
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cap);
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cap_index++;
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}
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else if (parasitics_->isCouplingCap(device)) {
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// Ground coupling caps for now.
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ParasiticNode *node1 = parasitics_->node1(device);
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float cap = parasitics_->value(device, parasitic_ap);
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streamPrint(spice_stream_, "C%d %s 0 %.3e\n",
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cap_index,
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nodeName(node1),
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cap);
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cap_index++;
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}
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}
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else
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streamPrint(spice_stream_, "* No parasitics found for this net.\n");
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// Add resistors from drvr to load for missing parasitic connections.
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auto pin_iter = network_->connectedPinIterator(drvr_pin);
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@ -1410,30 +1433,107 @@ WritePathSpice::writeStageParasitics(Stage stage)
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}
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delete pin_iter;
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if (parasitic) {
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// Sort node capacitors for consistent regression results.
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Vector<ParasiticNode*> nodes;
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ParasiticNodeIterator *node_iter = parasitics_->nodeIterator(parasitic);
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while (node_iter->hasNext()) {
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ParasiticNode *node = node_iter->next();
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nodes.push_back(node);
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}
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sort(nodes, ParasiticNodeLess(parasitics_));
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for (ParasiticNode *node : nodes) {
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float cap = parasitics_->nodeGndCap(node, parasitic_ap);
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// Spice has a cow over zero value caps.
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if (cap > 0.0) {
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streamPrint(spice_stream_, "C%d %s 0 %.3e\n",
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cap_index,
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nodeName(node),
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cap);
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cap_index++;
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}
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}
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delete node_iter;
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// Sort node capacitors for consistent regression results.
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Vector<ParasiticNode*> nodes;
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ParasiticNodeIterator *node_iter = parasitics_->nodeIterator(parasitic);
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while (node_iter->hasNext()) {
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ParasiticNode *node = node_iter->next();
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nodes.push_back(node);
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}
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sort(nodes, ParasiticNodeLess(parasitics_));
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for (ParasiticNode *node : nodes) {
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float cap = parasitics_->nodeGndCap(node, parasitic_ap);
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// Spice has a cow over zero value caps.
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if (cap > 0.0) {
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streamPrint(spice_stream_, "C%d %s 0 %.3e\n",
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cap_index,
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nodeName(node),
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cap);
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cap_index++;
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}
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}
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delete node_iter;
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}
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void
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WritePathSpice::writeStagePiElmore(Pin *drvr_pin,
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Parasitic *parasitic)
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{
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float c2, rpi, c1;
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parasitics_->piModel(parasitic, c2, rpi, c1);
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const char *c1_node = "n1";
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streamPrint(spice_stream_, "Rpi %s %s %.3e\n",
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network_->pathName(drvr_pin),
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c1_node,
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rpi);
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if (c2 > 0.0)
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streamPrint(spice_stream_, "C2 %s 0 %.3e\n",
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network_->pathName(drvr_pin),
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c2);
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if (c1 > 0.0)
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streamPrint(spice_stream_, "C1 %s 0 %.3e\n",
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c1_node,
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c1);
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int load_index = 3;
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auto pin_iter = network_->connectedPinIterator(drvr_pin);
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while (pin_iter->hasNext()) {
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const Pin *load_pin = pin_iter->next();
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if (load_pin != drvr_pin
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&& network_->isLoad(load_pin)
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&& !network_->isHierarchical(load_pin)) {
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float elmore;
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bool exists;
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parasitics_->findElmore(parasitic, load_pin, elmore, exists);
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if (exists) {
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streamPrint(spice_stream_, "E%d el%d 0 %s 0 1.0\n",
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load_index,
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load_index,
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network_->pathName(drvr_pin));
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streamPrint(spice_stream_, "R%d el%d %s 1.0\n",
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load_index,
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load_index,
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network_->pathName(load_pin));
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streamPrint(spice_stream_, "C%d %s 0 %.3e\n",
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load_index,
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network_->pathName(load_pin),
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elmore);
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}
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else
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// Add resistor from drvr to load for missing elmore.
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streamPrint(spice_stream_, "R%d %s %s %.3e\n",
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load_index,
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network_->pathName(drvr_pin),
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network_->pathName(load_pin),
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short_ckt_resistance_);
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load_index++;
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}
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}
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delete pin_iter;
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}
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void
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WritePathSpice::writeNullParasitics(Pin *drvr_pin)
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{
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int res_index = 1;
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// Add resistors from drvr to load for missing parasitic connections.
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auto pin_iter = network_->connectedPinIterator(drvr_pin);
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while (pin_iter->hasNext()) {
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const Pin *load_pin = pin_iter->next();
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if (load_pin != drvr_pin
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&& network_->isLoad(load_pin)
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&& !network_->isHierarchical(load_pin)) {
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streamPrint(spice_stream_, "R%d %s %s %.3e\n",
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res_index,
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network_->pathName(drvr_pin),
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network_->pathName(load_pin),
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short_ckt_resistance_);
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res_index++;
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}
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}
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delete pin_iter;
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}
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void
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