resolve conflict
Signed-off-by: dsengupta0628 <dsengupta@precisioninno.com>
This commit is contained in:
parent
03f976128f
commit
db46579a39
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@ -77,7 +77,6 @@ portVerilogName(const char *sta_name)
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return staToVerilog2(sta_name);
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}
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// Unescaping logic should follow reverse of verilogToSta logic
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static string
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staToVerilog(const char *sta_name)
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{
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@ -92,21 +91,9 @@ staToVerilog(const char *sta_name)
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escaped = true;
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char next_ch = s[1];
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if (next_ch == verilog_escape) {
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<<<<<<< HEAD
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// Only keep the character after "\"
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// to remove the escape added by verilogToSta"
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escaped_name += next_ch;
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s++;
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}
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=======
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escaped_name += ch;
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escaped_name += next_ch;
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s++;
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}
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else
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// Skip escape.
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escaped = true;
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>>>>>>> master
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}
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else {
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if ((!(isalnum(ch) || ch == '_')))
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@ -123,8 +110,6 @@ staToVerilog(const char *sta_name)
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return string(sta_name);
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}
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// Unescaping logic should follow reverse of verilogToSta logic
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// For "\\" handling, this should be like staToVerilog
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static string
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staToVerilog2(const char *sta_name)
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{
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@ -141,19 +126,9 @@ staToVerilog2(const char *sta_name)
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escaped = true;
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char next_ch = s[1];
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if (next_ch == verilog_escape) {
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<<<<<<< HEAD
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escaped_name += next_ch;
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s++;
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}
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=======
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escaped_name += ch;
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escaped_name += next_ch;
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s++;
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}
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else
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// Skip escape.
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escaped = true;
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>>>>>>> master
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}
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else {
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bool is_brkt = (ch == bus_brkt_left || ch == bus_brkt_right);
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