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rename examples 

Signed-off-by: James Cherry <cherry@parallaxsw.com>
This commit is contained in:
James Cherry 2022-12-26 17:19:25 -07:00
parent e3f8c693c0
commit da3f94462f
11 changed files with 24 additions and 9 deletions
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doc/OpenSTA.odt
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2
examples/example2.tcl → examples/delay_calc.tcl
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@ -1,5 +1,5 @@
# delay calc example # delay calc example
read_liberty example1_slow.lib read_liberty nangate45_slow.lib
read_verilog example1.v read_verilog example1.v
link_design top link_design top
create_clock -name clk -period 10 {clk1 clk2 clk3} create_clock -name clk -period 10 {clk1 clk2 clk3}

6
examples/example5.tcl
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@ -1,8 +1,8 @@
# 3 corners with +/- 10% derating example # 3 corners with +/- 10% derating example
define_corners ss tt ff define_corners ss tt ff
read_liberty -corner ss example1_slow.lib read_liberty -corner ss nangate45_slow.lib
read_liberty -corner tt example1_typ.lib read_liberty -corner tt nangate45_typ.lib
read_liberty -corner ff example1_fast.lib read_liberty -corner ff nangate45_fast.lib
read_verilog example1.v read_verilog example1.v
link_design top link_design top
set_timing_derate -early 0.9 set_timing_derate -early 0.9

4
examples/example3.tcl → examples/min_max_delays.tcl
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@ -1,6 +1,6 @@
# min/max delay calc example # min/max delay calc example
read_liberty -max example1_slow.lib read_liberty -max nangate45_slow.lib
read_liberty -min example1_fast.lib read_liberty -min nangate45_fast.lib
read_verilog example1.v read_verilog example1.v
link_design top link_design top
create_clock -name clk -period 10 {clk1 clk2 clk3} create_clock -name clk -period 10 {clk1 clk2 clk3}

15
examples/multi_corner.tcl Normal file
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@ -0,0 +1,15 @@
# 3 corners with +/- 10% derating example
define_corners ss tt ff
read_liberty -corner ss nangate45_slow.lib
read_liberty -corner tt nangate45_typ.lib
read_liberty -corner ff nangate45_fast.lib
read_verilog example1.v
link_design top
set_timing_derate -early 0.9
set_timing_derate -late 1.1
create_clock -name clk -period 10 {clk1 clk2 clk3}
set_input_delay -clock clk 0 {in1 in2}
# report all corners
report_checks -path_delay min_max
# report typical corner
report_checks -corner tt

0
examples/example1_fast.lib → examples/nangate45_fast.lib
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examples/example1_slow.lib → examples/nangate45_slow.lib
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examples/example1_typ.lib → examples/nangate45_typ.lib
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2
examples/example1.tcl → examples/sdf_delays.tcl
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@ -1,5 +1,5 @@
# sdf example # sdf example
read_liberty example1_slow.lib read_liberty nangate45_slow.lib
read_verilog example1.v read_verilog example1.v
link_design top link_design top
read_sdf example1.sdf read_sdf example1.sdf

4
examples/example4.tcl → examples/spef_parasitics.tcl
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# delay calc example with parasitics # delay calc with spef parasitics
read_liberty example1_slow.lib read_liberty nangate45_slow.lib
read_verilog example1.v read_verilog example1.v
link_design top link_design top
read_spef example1.dspef read_spef example1.dspef