ssta compile errors
Signed-off-by: James Cherry <cherry@parallaxsw.com>
This commit is contained in:
parent
e158ded82e
commit
d34cde34cd
|
|
@ -130,6 +130,12 @@ ArcDcalcArg::drvrNet(const Network *network) const
|
||||||
return network->net(drvr_pin_);
|
return network->net(drvr_pin_);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
float
|
||||||
|
ArcDcalcArg::inSlewFlt() const
|
||||||
|
{
|
||||||
|
return delayAsFloat(in_slew_);
|
||||||
|
}
|
||||||
|
|
||||||
void
|
void
|
||||||
ArcDcalcArg::setInSlew(Slew in_slew)
|
ArcDcalcArg::setInSlew(Slew in_slew)
|
||||||
{
|
{
|
||||||
|
|
|
||||||
|
|
@ -188,7 +188,7 @@ CcsSimDelayCalc::gateDelays(ArcDcalcArgSeq &dcalc_args,
|
||||||
GateTableModel *table_model = gateTableModel(dcalc_arg.arc(), dcalc_ap);
|
GateTableModel *table_model = gateTableModel(dcalc_arg.arc(), dcalc_ap);
|
||||||
if (table_model && dcalc_arg.parasitic()) {
|
if (table_model && dcalc_arg.parasitic()) {
|
||||||
OutputWaveforms *output_waveforms = table_model->outputWaveforms();
|
OutputWaveforms *output_waveforms = table_model->outputWaveforms();
|
||||||
Slew in_slew = dcalc_arg.inSlew();
|
float in_slew = delayAsFloat(dcalc_arg.inSlew());
|
||||||
if (output_waveforms
|
if (output_waveforms
|
||||||
// Bounds check because extrapolating waveforms does not work for shit.
|
// Bounds check because extrapolating waveforms does not work for shit.
|
||||||
&& output_waveforms->slewAxis()->inBounds(in_slew)
|
&& output_waveforms->slewAxis()->inBounds(in_slew)
|
||||||
|
|
@ -293,7 +293,7 @@ CcsSimDelayCalc::simulate(ArcDcalcArgSeq &dcalc_args)
|
||||||
ceff_[drvr_idx] = load_cap_;
|
ceff_[drvr_idx] = load_cap_;
|
||||||
// voltageTime is always for a rising waveform so 0.0v is initial voltage.
|
// voltageTime is always for a rising waveform so 0.0v is initial voltage.
|
||||||
drvr_current_[drvr_idx] =
|
drvr_current_[drvr_idx] =
|
||||||
output_waveforms_[drvr_idx]->voltageCurrent(dcalc_arg.inSlew(),
|
output_waveforms_[drvr_idx]->voltageCurrent(delayAsFloat(dcalc_arg.inSlew()),
|
||||||
ceff_[drvr_idx], 0.0);
|
ceff_[drvr_idx], 0.0);
|
||||||
}
|
}
|
||||||
// Initial time depends on ceff which impact delay, so use a sim step
|
// Initial time depends on ceff which impact delay, so use a sim step
|
||||||
|
|
@ -304,7 +304,7 @@ CcsSimDelayCalc::simulate(ArcDcalcArgSeq &dcalc_args)
|
||||||
initNodeVoltages();
|
initNodeVoltages();
|
||||||
|
|
||||||
// voltageTime is always for a rising waveform so 0.0v is initial voltage.
|
// voltageTime is always for a rising waveform so 0.0v is initial voltage.
|
||||||
double time_begin = output_waveforms_[0]->voltageTime(dcalc_args[0].inSlew(),
|
double time_begin = output_waveforms_[0]->voltageTime(dcalc_args[0].inSlewFlt(),
|
||||||
ceff_[0], 0.0);
|
ceff_[0], 0.0);
|
||||||
// Limit in case load voltage waveforms don't get to final value.
|
// Limit in case load voltage waveforms don't get to final value.
|
||||||
double time_end = time_begin + maxTime();
|
double time_end = time_begin + maxTime();
|
||||||
|
|
@ -361,7 +361,7 @@ CcsSimDelayCalc::timeStep()
|
||||||
double
|
double
|
||||||
CcsSimDelayCalc::maxTime()
|
CcsSimDelayCalc::maxTime()
|
||||||
{
|
{
|
||||||
return (*dcalc_args_)[0].inSlew()
|
return (*dcalc_args_)[0].inSlewFlt()
|
||||||
+ (drive_resistance_ + resistance_sum_) * load_cap_ * 2;
|
+ (drive_resistance_ + resistance_sum_) * load_cap_ * 2;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
@ -632,7 +632,7 @@ CcsSimDelayCalc::updateCeffIdrvr()
|
||||||
drvr_current_[i] = 0.0;
|
drvr_current_[i] = 0.0;
|
||||||
else
|
else
|
||||||
drvr_current_[i] =
|
drvr_current_[i] =
|
||||||
output_waveforms_[i]->voltageCurrent((*dcalc_args_)[i].inSlew(),
|
output_waveforms_[i]->voltageCurrent((*dcalc_args_)[i].inSlewFlt(),
|
||||||
ceff_[i], v);
|
ceff_[i], v);
|
||||||
}
|
}
|
||||||
else {
|
else {
|
||||||
|
|
@ -648,7 +648,7 @@ CcsSimDelayCalc::updateCeffIdrvr()
|
||||||
drvr_current_[i] = 0.0;
|
drvr_current_[i] = 0.0;
|
||||||
else
|
else
|
||||||
drvr_current_[i] =
|
drvr_current_[i] =
|
||||||
output_waveforms_[i]->voltageCurrent((*dcalc_args_)[i].inSlew(),
|
output_waveforms_[i]->voltageCurrent((*dcalc_args_)[i].inSlewFlt(),
|
||||||
ceff_[i], v);
|
ceff_[i], v);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
@ -763,7 +763,7 @@ CcsSimDelayCalc::inputWaveform(const Pin *in_pin,
|
||||||
DriverWaveform *driver_waveform = port->driverWaveform(in_rf);
|
DriverWaveform *driver_waveform = port->driverWaveform(in_rf);
|
||||||
const Vertex *in_vertex = graph_->pinLoadVertex(in_pin);
|
const Vertex *in_vertex = graph_->pinLoadVertex(in_pin);
|
||||||
DcalcAnalysisPt *dcalc_ap = corner->findDcalcAnalysisPt(min_max);
|
DcalcAnalysisPt *dcalc_ap = corner->findDcalcAnalysisPt(min_max);
|
||||||
Slew in_slew = graph_->slew(in_vertex, in_rf, dcalc_ap->index());
|
float in_slew = delayAsFloat(graph_->slew(in_vertex, in_rf, dcalc_ap->index()));
|
||||||
LibertyLibrary *library = port->libertyLibrary();
|
LibertyLibrary *library = port->libertyLibrary();
|
||||||
float vdd;
|
float vdd;
|
||||||
bool vdd_exists;
|
bool vdd_exists;
|
||||||
|
|
|
||||||
|
|
@ -72,6 +72,7 @@ public:
|
||||||
Edge *edge() const { return edge_; }
|
Edge *edge() const { return edge_; }
|
||||||
const TimingArc *arc() const { return arc_; }
|
const TimingArc *arc() const { return arc_; }
|
||||||
Slew inSlew() const { return in_slew_; }
|
Slew inSlew() const { return in_slew_; }
|
||||||
|
float inSlewFlt() const;
|
||||||
void setInSlew(Slew in_slew);
|
void setInSlew(Slew in_slew);
|
||||||
const Parasitic *parasitic() { return parasitic_; }
|
const Parasitic *parasitic() { return parasitic_; }
|
||||||
void setParasitic(const Parasitic *parasitic);
|
void setParasitic(const Parasitic *parasitic);
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue