TimingArcSets share TimingArcAttrs

Signed-off-by: James Cherry <cherry@parallaxsw.com>

dcalc/DelayCalc.tcl

@@ -84,7 +84,10 @@ proc report_edge_dcalc { edge corner min_max digits } {
 	    || ($min_max=="min" && $role=="setup"))} {
       report_line "Library: [get_name $library]"
       report_line "Cell: [get_name $cell]"
-      report_line "Arc sense: [$edge sense]"
+      set sense [$edge sense]
+      if { $sense != "unknown" } {
+        report_line "Arc sense: $sense"
+      }
       report_line "Arc type: $role"
 
       foreach arc [$edge timing_arcs] {

include/sta/Liberty.hh

@@ -72,7 +72,6 @@ typedef Map<const char *, ModeDef*, CharPtrLess> ModeDefMap;
 typedef Map<const char *, ModeValueDef*, CharPtrLess> ModeValueMap;
 typedef Map<TimingArcSet*, LatchEnable*> LatchEnableMap;
 typedef Map<const char *, OcvDerate*, CharPtrLess> OcvDerateMap;
-typedef Vector<TimingArcAttrs*> TimingArcAttrsSeq;
 typedef Vector<InternalPowerAttrs*> InternalPowerAttrsSeq;
 typedef Map<const char *, float, CharPtrLess> SupplyVoltageMap;
 typedef Map<const char *, LibertyPgPort*, CharPtrLess> LibertyPgPortMap;
@@ -467,7 +466,6 @@ public:
   void addScaledCell(OperatingConditions *op_cond,
 		     LibertyCell *scaled_cell);
   unsigned addTimingArcSet(TimingArcSet *set);
-  void addTimingArcAttrs(TimingArcAttrs *attrs);
   void addInternalPower(InternalPower *power);
   void addInternalPowerAttrs(InternalPowerAttrs *attrs);
   void addLeakagePower(LeakagePower *power);
@@ -496,7 +494,6 @@ protected:
   void addPort(ConcretePort *port);
   void setHasInternalPorts(bool has_internal);
   void setLibertyLibrary(LibertyLibrary *library);
-  void deleteTimingArcAttrs();
   void makeLatchEnables(Report *report,
 			Debug *debug);
   FuncExpr *findLatchEnableFunc(LibertyPort *data,
@@ -534,7 +531,6 @@ protected:
   LibertyPortPairTimingArcMap port_timing_arc_set_map_;
   LibertyPortTimingArcMap timing_arc_set_from_map_;
   LibertyPortTimingArcMap timing_arc_set_to_map_;
-  TimingArcAttrsSeq timing_arc_attrs_;
   bool has_infered_reg_timing_arcs_;
   InternalPowerSeq internal_powers_;
   PortInternalPowerSeq port_internal_powers_;

include/sta/TimingArc.hh

@@ -85,8 +85,8 @@ class TimingArcAttrs
 {
 public:
   TimingArcAttrs();
+  TimingArcAttrs(TimingSense sense);
   virtual ~TimingArcAttrs();
-  void deleteContents();
   TimingType timingType() const { return timing_type_; }
   void setTimingType(TimingType type);
   TimingSense timingSense() const { return timing_sense_; }
@@ -194,12 +194,14 @@ public:
 
 protected:
   void init(LibertyCell *cell);
-  TimingArcSet(TimingRole *role);
+  TimingArcSet(TimingRole *role,
+               TimingArcAttrs *attrs);
 
   LibertyPort *from_;
   LibertyPort *to_;
   LibertyPort *related_out_;
   TimingRole *role_;
+  TimingArcAttrs *attrs_;
   TimingArcSeq arcs_;
   FuncExpr *cond_;
   bool is_cond_default_;
@@ -214,6 +216,7 @@ protected:
   TimingArc *from_arc2_[RiseFall::index_count];
   TimingArc *to_arc_[RiseFall::index_count];
 
+  static TimingArcAttrs *wire_timing_arc_attrs_;
   static TimingArcSet *wire_timing_arc_set_;
 };
 

liberty/Liberty.cc

@@ -894,7 +894,6 @@ LibertyCell::~LibertyCell()
   mode_defs_.deleteContents();
   latch_d_to_q_map_.deleteContents();
 
-  deleteTimingArcAttrs();
   timing_arc_sets_.deleteContents();
   port_timing_arc_set_map_.deleteContents();
   timing_arc_set_from_map_.deleteContents();
@@ -914,15 +913,6 @@ LibertyCell::~LibertyCell()
   pg_port_map_.deleteContents();
 }
 
-void
-LibertyCell::deleteTimingArcAttrs()
-{
-  for (auto attrs : timing_arc_attrs_) {
-    attrs->deleteContents();
-    delete attrs;
-  }
-}
-
 LibertyPort *
 LibertyCell::findLibertyPort(const char *name) const
 {
@@ -1168,12 +1158,6 @@ LibertyCell::addTimingArcSet(TimingArcSet *arc_set)
   return set_index;
 }
 
-void
-LibertyCell::addTimingArcAttrs(TimingArcAttrs *attrs)
-{
-  timing_arc_attrs_.push_back(attrs);
-}
-
 void
 LibertyCell::addInternalPower(InternalPower *power)
 {

liberty/LibertyReader.cc

@@ -1903,7 +1903,6 @@ LibertyReader::makeTimingArcs(PortGroup *port_group)
       LibertyPort *port = port_iter.next();
       makeTimingArcs(port, timing);
     }
-    cell_->addTimingArcAttrs(timing);
   }
 }
 

liberty/LibertyWriter.cc

@@ -363,9 +363,11 @@ LibertyWriter::writeTimingArcSet(const TimingArcSet *arc_set)
 {
   fprintf(stream_, "      timing() {\n");
   fprintf(stream_, "        related_pin : \"%s\";\n", arc_set->from()->name());
-  if (arc_set->sense() != TimingSense::non_unate)
+  TimingSense sense = arc_set->sense();
+  if (sense != TimingSense::unknown
+      && sense != TimingSense::non_unate)
     fprintf(stream_, "        timing_sense : %s;\n",
-            timingSenseString(arc_set->sense()));
+            timingSenseString(sense));
   const char *timing_type = timingTypeString(arc_set);
   if (timing_type)
     fprintf(stream_, "        timing_type : %s;\n", timing_type);

liberty/TableModel.cc

@@ -774,8 +774,8 @@ Table1::Table1(FloatSeq *values,
 Table1::~Table1()
 {
   delete values_;
-  if (own_axis1_)
+  //if (own_axis1_)
-    delete axis1_;
+  //delete axis1_;
 }
 
 float

liberty/TimingArc.cc

@@ -47,15 +47,21 @@ TimingArcAttrs::TimingArcAttrs() :
 {
 }
 
-// Destructor does NOT delete contents because it is a component
+TimingArcAttrs::TimingArcAttrs(TimingSense sense) :
-// of TimingGroup (that is deleted after building the LibertyCell)
+  timing_type_(TimingType::combinational),
-// and (potentially) multiple TimingArcSets.
+  timing_sense_(sense),
-TimingArcAttrs::~TimingArcAttrs()
+  cond_(nullptr),
+  sdf_cond_(nullptr),
+  sdf_cond_start_(nullptr),
+  sdf_cond_end_(nullptr),
+  mode_name_(nullptr),
+  mode_value_(nullptr),
+  ocv_arc_depth_(0.0),
+  models_{nullptr, nullptr}
 {
 }
 
-void
+TimingArcAttrs::~TimingArcAttrs()
-TimingArcAttrs::deleteContents()
 {
   if (cond_)
     cond_->deleteSubexprs();
@@ -164,6 +170,7 @@ TimingArc::intrinsicDelay() const
 
 ////////////////////////////////////////////////////////////////
 
+TimingArcAttrs *TimingArcSet::wire_timing_arc_attrs_ = nullptr;
 TimingArcSet *TimingArcSet::wire_timing_arc_set_ = nullptr;
 
 TimingArcSet::TimingArcSet(LibertyCell *cell,
@@ -176,6 +183,7 @@ TimingArcSet::TimingArcSet(LibertyCell *cell,
   to_(to),
   related_out_(related_out),
   role_(role),
+  attrs_(attrs),
   cond_(attrs->cond()),
   is_cond_default_(false),
   sdf_cond_start_(attrs->sdfCondStart()),
@@ -193,11 +201,13 @@ TimingArcSet::TimingArcSet(LibertyCell *cell,
   init(cell);
 }
 
-TimingArcSet::TimingArcSet(TimingRole *role) :
+TimingArcSet::TimingArcSet(TimingRole *role,
+                           TimingArcAttrs *attrs) :
   from_(nullptr),
   to_(nullptr),
   related_out_(nullptr),
   role_(role),
+  attrs_(attrs),
   cond_(nullptr),
   is_cond_default_(false),
   sdf_cond_start_(nullptr),
@@ -226,6 +236,7 @@ TimingArcSet::init(LibertyCell *cell)
 TimingArcSet::~TimingArcSet()
 {
   arcs_.deleteContents();
+  delete attrs_;
 }
 
 bool
@@ -323,12 +334,7 @@ TimingArcSet::arcTo(const RiseFall *to_rf) const
 TimingSense
 TimingArcSet::sense() const
 {
-  if (arcs_.size() == 1)
+  return attrs_->timingSense();
-    return arcs_[0]->sense();
-  else if (arcs_.size() == 2 && arcs_[0]->sense() == arcs_[1]->sense())
-    return arcs_[0]->sense();
-  else
-    return TimingSense::non_unate;
 }
 
 RiseFall *
@@ -521,7 +527,8 @@ TimingArcSet::wireArcIndex(const RiseFall *rf)
 void
 TimingArcSet::init()
 {
-  wire_timing_arc_set_ = new TimingArcSet(TimingRole::wire());
+  wire_timing_arc_attrs_ = new TimingArcAttrs(TimingSense::positive_unate);
+  wire_timing_arc_set_ = new TimingArcSet(TimingRole::wire(), wire_timing_arc_attrs_);
   new TimingArc(wire_timing_arc_set_, Transition::rise(),
 		Transition::rise(), nullptr);
   new TimingArc(wire_timing_arc_set_, Transition::fall(),
@@ -533,6 +540,7 @@ TimingArcSet::destroy()
 {
   delete wire_timing_arc_set_;
   wire_timing_arc_set_ = nullptr;
+  wire_timing_arc_attrs_ = nullptr;
 }
 
 ////////////////////////////////////////////////////////////////

search/MakeTimingModel.cc

@@ -346,7 +346,6 @@ MakeTimingModel::makeSetupHoldTimingArcs(const Pin *input_pin,
           lib_builder_->makeFromTransitionArcs(cell_, clk_port,
                                                input_port, nullptr,
                                                clk_rf, role, attrs);
-          cell_->addTimingArcAttrs(attrs);
         }
       }
     }
@@ -434,7 +433,6 @@ MakeTimingModel::findClkedOutputPaths()
                                                  output_port, nullptr,
                                                  clk_rf, TimingRole::regClkToQ(),
                                                  attrs);
-            cell_->addTimingArcAttrs(attrs);
           }
         }
       }

tcl/StaTcl.i

@@ -1973,8 +1973,12 @@ report_file_warn(int id,
 void
 report_line(const char *msg)
 {
-  Report *report = Sta::sta()->report();
+  Sta *sta = Sta::sta();
-  report->reportLineString(msg);
+  if (sta)
+    sta->report()->reportLineString(msg);
+  else
+    // After sta::delete_all_memory souce -echo prints the cmd file line
+    printf("%s\n", msg);
 }
 
 void