restore ArcDelayCalc::reducedParasiticType

Signed-off-by: James Cherry <cherry@parallaxsw.com>

dcalc/ArcDelayCalc.cc

@@ -25,15 +25,15 @@ ArcDelayCalc::ArcDelayCalc(StaState *sta):
 
 void
 ArcDelayCalc::gateDelay(const TimingArc *arc,
-			 const Slew &in_slew,
+                        const Slew &in_slew,
-			 float load_cap,
+                        float load_cap,
-			 const Parasitic *parasitic,
+                        const Parasitic *parasitic,
-			 float,
+                        float,
-			 const Pvt *,
+                        const Pvt *,
-			 const DcalcAnalysisPt *dcalc_ap,
+                        const DcalcAnalysisPt *dcalc_ap,
-			 // Return values.
+                        // Return values.
-			 ArcDelay &gate_delay,
+                        ArcDelay &gate_delay,
-			 Slew &drvr_slew)
+                        Slew &drvr_slew)
 {
   LoadPinIndexMap load_pin_index_map(network_);
   ArcDcalcResult dcalc_result = gateDelay(nullptr, arc, in_slew, load_cap, parasitic,

dcalc/ArnoldiDelayCalc.cc

@@ -117,6 +117,7 @@ public:
   Parasitic *findParasitic(const Pin *drvr_pin,
                            const RiseFall *rf,
                            const DcalcAnalysisPt *dcalc_ap) override;
+  ReducedParasiticType reducedParasiticType() const override;
   ArcDcalcResult inputPortDelay(const Pin *port_pin,
                                 float in_slew,
                                 const RiseFall *rf,
@@ -297,6 +298,12 @@ ArnoldiDelayCalc::findParasitic(const Pin *drvr_pin,
   return parasitic;
 }
 
+ReducedParasiticType
+ArnoldiDelayCalc::reducedParasiticType() const
+{
+  return ReducedParasiticType::arnoldi;
+}
+
 ArcDcalcResult
 ArnoldiDelayCalc::inputPortDelay(const Pin *,
                                  float in_slew,

dcalc/DmpDelayCalc.cc

@@ -132,6 +132,7 @@ public:
   Parasitic *findParasitic(const Pin *drvr_pin,
                            const RiseFall *rf,
                            const DcalcAnalysisPt *dcalc_ap) override;
+  ReducedParasiticType reducedParasiticType() const override;
   ArcDcalcResult inputPortDelay(const Pin *port_pin,
                                 float in_slew,
                                 const RiseFall *rf,
@@ -255,6 +256,12 @@ DmpCeffTwoPoleDelayCalc::findParasitic(const Pin *drvr_pin,
   return parasitic;
 }
 
+ReducedParasiticType
+DmpCeffTwoPoleDelayCalc::reducedParasiticType() const
+{
+  return ReducedParasiticType::pi_pole_residue2;
+}
+
 ArcDcalcResult
 DmpCeffTwoPoleDelayCalc::inputPortDelay(const Pin *,
                                         float in_slew,

dcalc/LumpedCapDelayCalc.cc

@@ -101,6 +101,12 @@ LumpedCapDelayCalc::findParasitic(const Pin *drvr_pin,
   return parasitic;
 }
 
+ReducedParasiticType
+LumpedCapDelayCalc::reducedParasiticType() const
+{
+  return ReducedParasiticType::pi_elmore;
+}
+
 ArcDcalcResult
 LumpedCapDelayCalc::inputPortDelay(const Pin *,
                                    float in_slew,

dcalc/LumpedCapDelayCalc.hh

@@ -30,6 +30,7 @@ public:
   Parasitic *findParasitic(const Pin *drvr_pin,
                            const RiseFall *rf,
                            const DcalcAnalysisPt *dcalc_ap) override;
+  ReducedParasiticType reducedParasiticType() const override;
   ArcDcalcResult inputPortDelay(const Pin *port_pin,
                                 float in_slew,
                                 const RiseFall *rf,

dcalc/UnitDelayCalc.cc

@@ -45,6 +45,12 @@ UnitDelayCalc::findParasitic(const Pin *,
   return nullptr;
 }
 
+ReducedParasiticType
+UnitDelayCalc::reducedParasiticType() const
+{
+  return ReducedParasiticType::none;
+}
+
 ArcDcalcResult
 UnitDelayCalc::inputPortDelay(const Pin *,
 			      float,

dcalc/UnitDelayCalc.hh

@@ -29,6 +29,7 @@ public:
   Parasitic *findParasitic(const Pin *drvr_pin,
                            const RiseFall *rf,
                            const DcalcAnalysisPt *dcalc_ap) override;
+  ReducedParasiticType reducedParasiticType() const override;
   ArcDcalcResult inputPortDelay(const Pin *port_pin,
                                 float in_slew,
                                 const RiseFall *rf,

include/sta/ArcDelayCalc.hh

@@ -124,6 +124,7 @@ public:
   virtual Parasitic *findParasitic(const Pin *drvr_pin,
 				   const RiseFall *rf,
 				   const DcalcAnalysisPt *dcalc_ap) = 0;
+  virtual ReducedParasiticType reducedParasiticType() const = 0;
   // Find the wire delays and slews for an input port without a driving cell.
   // This call primarily initializes the load delay/slew iterator.
   virtual ArcDcalcResult inputPortDelay(const Pin *port_pin,