gcc 9.1.0 warnings

This commit is contained in:
James Cherry 2020-11-09 19:44:50 -08:00
parent a4df141cbc
commit b3d8ae3d31
12 changed files with 29 additions and 42 deletions

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@ -449,6 +449,13 @@ target_include_directories(OpenSTA
${CUDD_INCLUDE}
)
target_compile_options(OpenSTA
PRIVATE
$<$<CXX_COMPILER_ID:GNU>:-Wall -Wextra -pedantic -Wcast-qual -Wredundant-decls -Wformat-security>
$<$<CXX_COMPILER_ID:AppleClang>:-Wall -Wextra -pedantic -Wcast-qual -Wredundant-decls -Wformat-security>
$<$<CXX_COMPILER_ID:Clang>:-Wall -Wextra -pedantic -Wcast-qual -Wredundant-decls -Wformat-security>
)
# Disable compiler specific extensions like gnu++11.
set_target_properties(OpenSTA PROPERTIES CXX_EXTENSIONS OFF)
target_compile_features(OpenSTA PUBLIC cxx_std_11)
@ -465,13 +472,6 @@ set(CMAKE_RUNTIME_OUTPUT_DIRECTORY ${STA_HOME}/app)
# lib name results in "No rule to make target ../depend.
add_executable(sta app/Main.cc)
target_compile_options(sta
PRIVATE
$<$<CXX_COMPILER_ID:GNU>:-Wall -Wextra -pedantic -Wcast-qual -Wredundant-decls -Wformat-security>
$<$<CXX_COMPILER_ID:AppleClang>:-Wall -Wextra -pedantic -Wcast-qual -Wredundant-decls -Wformat-security>
$<$<CXX_COMPILER_ID:Clang>:-Wall -Wextra -pedantic -Wcast-qual -Wredundant-decls -Wformat-security>
)
target_link_libraries(sta
sta_swig
OpenSTA

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@ -57,6 +57,12 @@ Delay::Delay() :
{
}
Delay::Delay(const Delay &delay) :
mean_(delay.mean_),
sigma2_(delay.sigma2_)
{
}
Delay::Delay(float mean) :
mean_(mean),
sigma2_(0.0)

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@ -57,6 +57,13 @@ Delay::Delay() :
{
}
Delay::Delay(const Delay &delay) :
mean_(delay.mean_)
{
sigma2_[EarlyLate::earlyIndex()] = delay.sigma2_[EarlyLate::earlyIndex()];
sigma2_[EarlyLate::lateIndex()] = delay.sigma2_[EarlyLate::lateIndex()];
}
Delay::Delay(float mean) :
mean_(mean),
sigma2_{0.0, 0.0}

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@ -67,12 +67,12 @@ private:
template <class TYPE>
ArrayTable<TYPE>::ArrayTable() :
size_(0),
free_block_idx_(block_idx_null),
free_idx_(object_idx_null),
blocks_size_(0),
blocks_capacity_(1024),
blocks_(new ArrayBlock<TYPE>*[blocks_capacity_]),
prev_blocks_(nullptr),
free_block_idx_(block_idx_null),
free_idx_(object_idx_null)
prev_blocks_(nullptr)
{
}
@ -88,7 +88,7 @@ template <class TYPE>
void
ArrayTable<TYPE>::deleteBlocks()
{
for (int i = 0; i < blocks_size_; i++)
for (size_t i = 0; i < blocks_size_; i++)
delete blocks_[i];
}

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@ -28,6 +28,7 @@ class Delay
{
public:
Delay();
Delay(const Delay &delay);
Delay(float mean);
Delay(float mean,
float sigma2);

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@ -28,6 +28,7 @@ class Delay
{
public:
Delay();
Delay(const Delay &delay);
Delay(float mean);
Delay(float mean,
float sigma2_early,

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@ -936,7 +936,7 @@ Network::findInstPinsMatching(const Instance *instance,
}
void
Network::location(const Pin *pin,
Network::location(const Pin *,
// Return values.
double &x,
double &y,

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@ -1540,7 +1540,6 @@ Sdc::removeClockLatency(const Clock *clk,
void
Sdc::deleteClockLatency(ClockLatency *latency)
{
const Pin *pin = latency->pin();
clk_latencies_.erase(latency);
delete latency;
}

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@ -204,7 +204,6 @@ CheckCapacitanceLimits::checkCapacitance(const Pin *pin,
float &limit) const
{
const DcalcAnalysisPt *dcalc_ap = corner->findDcalcAnalysisPt(min_max);
const OperatingConditions *op_cond = dcalc_ap->operatingConditions();
GraphDelayCalc *dcalc = sta_->graphDelayCalc();
float cap = dcalc->loadCap(pin, dcalc_ap);
@ -248,7 +247,6 @@ CheckCapacitanceLimits::pinCapacitanceLimitViolations(Instance *inst,
PinSeq *violators)
{
const Network *network = sta_->network();
const Sim *sim = sta_->sim();
InstancePinIterator *pin_iter = network->pinIterator(inst);
while (pin_iter->hasNext()) {
Pin *pin = pin_iter->next();
@ -292,7 +290,6 @@ CheckCapacitanceLimits::pinMinCapacitanceLimitSlack(Instance *inst,
float &min_slack)
{
const Network *network = sta_->network();
const Sim *sim = sta_->sim();
InstancePinIterator *pin_iter = network->pinIterator(inst);
while (pin_iter->hasNext()) {
Pin *pin = pin_iter->next();
@ -320,7 +317,6 @@ CheckCapacitanceLimits::checkPin(Pin *pin)
const Sim *sim = sta_->sim();
const Sdc *sdc = sta_->sdc();
const Graph *graph = sta_->graph();
Search *search = sta_->search();
Vertex *vertex = graph->pinLoadVertex(pin);
return network->direction(pin)->isAnyOutput()
&& !sim->logicZeroOne(pin)

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@ -226,7 +226,6 @@ CheckFanoutLimits::pinFanoutLimitViolations(Instance *inst,
PinSeq *violators)
{
const Network *network = sta_->network();
const Sim *sim = sta_->sim();
InstancePinIterator *pin_iter = network->pinIterator(inst);
while (pin_iter->hasNext()) {
Pin *pin = pin_iter->next();

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@ -267,7 +267,8 @@ PathVertex::setRequired(const Required &required,
int arrival_count = tag_group->arrivalCount();
if (!vertex_->hasRequireds()) {
Arrival *new_arrivals = graph->makeArrivals(vertex_, arrival_count * 2);
memcpy(new_arrivals, arrivals, arrival_count * sizeof(Arrival));
for (int i = 0; i < arrival_count; i++)
new_arrivals[i] =arrivals[i];
vertex_->setHasRequireds(true);
arrivals = new_arrivals;
}

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@ -840,7 +840,6 @@ Power::findInputDuty(const Pin *to_pin,
InternalPower *pwr)
{
const char *related_pg_pin = pwr->relatedPgPin();
const LibertyPort *from_port = pwr->relatedPort();
if (from_port) {
const Pin *from_pin = network_->findPin(inst, from_port);
@ -889,28 +888,6 @@ isPositiveUnate(const LibertyCell *cell,
////////////////////////////////////////////////////////////////
static bool
isPortRef(FuncExpr *expr,
const LibertyPort *port)
{
return (expr->op() == FuncExpr::op_port
&& expr->port() == port)
|| (expr->op() == FuncExpr::op_not
&& expr->left()->op() == FuncExpr::op_port
&& expr->left()->port() == port);
}
static FuncExpr *
negate(FuncExpr *expr)
{
if (expr->op() == FuncExpr::op_not)
return expr->left()->copy();
else
return FuncExpr::makeNot(expr->copy());
}
////////////////////////////////////////////////////////////////
void
Power::findLeakagePower(const Instance *,
LibertyCell *cell,