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LibertyBuilder::makeRegLatchArcs null ref resolves #368 

Signed-off-by: James Cherry <cherry@parallaxsw.com>
This commit is contained in:
James Cherry 2026-01-20 17:35:25 -07:00
parent 1da3e24afe
commit b04ffe737b
1 changed files with 20 additions and 18 deletions
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38
liberty/LibertyBuilder.cc
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@ -424,25 +424,27 @@ LibertyBuilder::makeRegLatchArcs(LibertyCell *cell,
TimingArcAttrsPtr attrs) TimingArcAttrsPtr attrs)
{ {
FuncExpr *to_func = to_port->function(); FuncExpr *to_func = to_port->function();
LibertyPortSet to_ports = to_func->ports(); if (to_func) {
for (LibertyPort *func_port : to_ports) { LibertyPortSet to_ports = to_func->ports();
Sequential *seq = cell->outputPortSequential(func_port); for (LibertyPort *func_port : to_ports) {
if (seq) { Sequential *seq = cell->outputPortSequential(func_port);
if (seq->clock() && seq->clock()->hasPort(from_port)) { if (seq) {
const TimingRole *role = seq->isRegister() ? if (seq->clock() && seq->clock()->hasPort(from_port)) {
TimingRole::regClkToQ() : TimingRole::latchEnToQ(); const TimingRole *role = seq->isRegister() ?
return makeFromTransitionArcs(cell, from_port, to_port, nullptr, TimingRole::regClkToQ() : TimingRole::latchEnToQ();
from_rf, role, attrs); return makeFromTransitionArcs(cell, from_port, to_port, nullptr,
from_rf, role, attrs);
}
else if (seq->isLatch()
&& seq->data()
&& seq->data()->hasPort(from_port))
return makeFromTransitionArcs(cell, from_port, to_port, nullptr,
from_rf, TimingRole::latchDtoQ(), attrs);
else if ((seq->clear() && seq->clear()->hasPort(from_port))
|| (seq->preset() && seq->preset()->hasPort(from_port)))
return makeFromTransitionArcs(cell, from_port, to_port, nullptr,
from_rf, TimingRole::regSetClr(), attrs);
} }
else if (seq->isLatch()
&& seq->data()
&& seq->data()->hasPort(from_port))
return makeFromTransitionArcs(cell, from_port, to_port, nullptr,
from_rf, TimingRole::latchDtoQ(), attrs);
else if ((seq->clear() && seq->clear()->hasPort(from_port))
|| (seq->preset() && seq->preset()->hasPort(from_port)))
return makeFromTransitionArcs(cell, from_port, to_port, nullptr,
from_rf, TimingRole::regSetClr(), attrs);
} }
} }
// No associated ff/latch - assume register clk->q. // No associated ff/latch - assume register clk->q.