paths output ports respect sta_input_port_default_clock
Signed-off-by: James Cherry <cherry@parallaxsw.com>
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18f11a3029
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@ -344,6 +344,7 @@ VisitPathEnds::visitOutputDelayEnd1(OutputDelay *output_delay,
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// but the exception may be -to clk.
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ExceptionPath *exception = exceptionTo(path, pin, end_rf, tgt_clk_edge,
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min_max);
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ClockEdge *src_clk_edge = path->clkEdge(this);
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if (exception
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&& exception->isPathDelay()) {
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PathDelay *path_delay = dynamic_cast<PathDelay*>(exception);
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@ -351,7 +352,11 @@ VisitPathEnds::visitOutputDelayEnd1(OutputDelay *output_delay,
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visitor->visit(&path_end);
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is_constrained = true;
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}
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else if (tgt_clk_edge
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else if (src_clk_edge
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&& (search_->checkDefaultArrivalPaths()
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|| src_clk_edge
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!= sdc_->defaultArrivalClockEdge())
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&& tgt_clk_edge
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&& sdc_->sameClockGroup(path->clock(this), tgt_clk_edge->clock())
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// False paths and path delays override.
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&& (exception == nullptr
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