issue 149, 150, cmdNetwork->Sta::ensureLinked check libs
commit 6f3634724fa52fb9d88418c1fa550cc86f8bdf10
Author: James Cherry <cherry@parallaxsw.com>
Date: Thu Dec 19 11:49:15 2024 -0700
rm cmdLinkedNetwork
Signed-off-by: James Cherry <cherry@parallaxsw.com>
commit 4d5339327d2c373c3628cafed4ecb243718dc769
Author: James Cherry <cherry@parallaxsw.com>
Date: Thu Dec 19 10:13:03 2024 -0700
Sta::ensureLinked
Signed-off-by: James Cherry <cherry@parallaxsw.com>
commit f17e408fcd10a72f2d8a627cfaf36f22be5c9ef3
Author: James Cherry <cherry@parallaxsw.com>
Date: Wed Dec 18 15:54:34 2024 -0700
Sta::ensureNetwork()
Signed-off-by: James Cherry <cherry@parallaxsw.com>
Signed-off-by: James Cherry <cherry@parallaxsw.com>
This commit is contained in:
parent
adfafa9b10
commit
a06c4fc7ac
|
|
@ -59,8 +59,8 @@ report_delay_calc_cmd(Edge *edge,
|
|||
const MinMax *min_max,
|
||||
int digits)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
return Sta::sta()->reportDelayCalc(edge, arc, corner, min_max, digits);
|
||||
Sta *sta = Sta::sta();
|
||||
return sta->reportDelayCalc(edge, arc, corner, min_max, digits);
|
||||
}
|
||||
|
||||
void
|
||||
|
|
@ -77,7 +77,6 @@ set_prima_reduce_order(size_t order)
|
|||
void
|
||||
find_delays()
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta::sta()->findDelays();
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -27,13 +27,6 @@
|
|||
#include "Search.hh"
|
||||
#include "Sta.hh"
|
||||
|
||||
namespace sta {
|
||||
|
||||
Graph *
|
||||
cmdGraph();
|
||||
|
||||
} // namespace
|
||||
|
||||
using namespace sta;
|
||||
|
||||
%}
|
||||
|
|
@ -85,25 +78,26 @@ private:
|
|||
int
|
||||
graph_vertex_count()
|
||||
{
|
||||
return cmdGraph()->vertexCount();
|
||||
return Sta::sta()->ensureGraph()->vertexCount();
|
||||
}
|
||||
|
||||
int
|
||||
graph_edge_count()
|
||||
{
|
||||
return cmdGraph()->edgeCount();
|
||||
return Sta::sta()->ensureGraph()->edgeCount();
|
||||
}
|
||||
|
||||
int
|
||||
graph_arc_count()
|
||||
{
|
||||
return cmdGraph()->arcCount();
|
||||
return Sta::sta()->ensureGraph()->arcCount();
|
||||
}
|
||||
|
||||
VertexIterator *
|
||||
vertex_iterator()
|
||||
{
|
||||
return new VertexIterator(cmdGraph());
|
||||
Graph *graph = Sta::sta()->ensureGraph();
|
||||
return new VertexIterator(graph);
|
||||
}
|
||||
|
||||
void
|
||||
|
|
@ -113,7 +107,6 @@ set_arc_delay(Edge *edge,
|
|||
const MinMaxAll *min_max,
|
||||
float delay)
|
||||
{
|
||||
cmdGraph();
|
||||
Sta::sta()->setArcDelay(edge, arc, corner, min_max, delay);
|
||||
}
|
||||
|
||||
|
|
@ -124,7 +117,6 @@ set_annotated_slew(Vertex *vertex,
|
|||
const RiseFallBoth *rf,
|
||||
float slew)
|
||||
{
|
||||
cmdGraph();
|
||||
Sta::sta()->setAnnotatedSlew(vertex, corner, min_max, rf, slew);
|
||||
}
|
||||
|
||||
|
|
@ -132,7 +124,6 @@ set_annotated_slew(Vertex *vertex,
|
|||
void
|
||||
remove_delay_slew_annotations()
|
||||
{
|
||||
cmdGraph();
|
||||
Sta::sta()->removeDelaySlewAnnotations();
|
||||
}
|
||||
|
||||
|
|
@ -422,7 +413,7 @@ latch_d_to_q_en()
|
|||
{
|
||||
if (self->role() == TimingRole::latchDtoQ()) {
|
||||
Sta *sta = Sta::sta();
|
||||
const Network *network = sta->cmdNetwork();
|
||||
const Network *network = sta->ensureLinked();
|
||||
const Graph *graph = sta->graph();
|
||||
Pin *from_pin = self->from(graph)->pin();
|
||||
Instance *inst = network->instance(from_pin);
|
||||
|
|
|
|||
|
|
@ -123,7 +123,7 @@ public:
|
|||
virtual void readLibertyAfter(LibertyLibrary *library);
|
||||
// First liberty library read is used to look up defaults.
|
||||
// This corresponds to a link_path of '*'.
|
||||
LibertyLibrary *defaultLibertyLibrary() const;
|
||||
virtual LibertyLibrary *defaultLibertyLibrary() const;
|
||||
void setDefaultLibertyLibrary(LibertyLibrary *library);
|
||||
// Check liberty cells used by the network to make sure they exist
|
||||
// for all the defined corners.
|
||||
|
|
|
|||
|
|
@ -34,6 +34,7 @@ public:
|
|||
|
||||
const char *name(const Library *library) const override;
|
||||
ObjectId id(const Library *library) const override;
|
||||
LibertyLibrary *defaultLibertyLibrary() const override;
|
||||
LibraryIterator *libraryIterator() const override;
|
||||
LibertyLibraryIterator *libertyLibraryIterator() const override;
|
||||
Library *findLibrary(const char *name) override;
|
||||
|
|
|
|||
|
|
@ -1190,7 +1190,7 @@ public:
|
|||
// disconnect_net
|
||||
virtual void disconnectPin(Pin *pin);
|
||||
virtual void makePortPin(const char *port_name,
|
||||
const char *direction);
|
||||
PortDirection *dir);
|
||||
// Notify STA of network change.
|
||||
void networkChanged();
|
||||
void deleteLeafInstanceBefore(const Instance *inst);
|
||||
|
|
@ -1230,6 +1230,8 @@ public:
|
|||
|
||||
void setTclInterp(Tcl_Interp *interp);
|
||||
Tcl_Interp *tclInterp();
|
||||
// Ensure a network has been read, linked and liberty libraries exist.
|
||||
Network *ensureLinked();
|
||||
void ensureLevelized();
|
||||
// Ensure that the timing graph has been built.
|
||||
Graph *ensureGraph();
|
||||
|
|
@ -1287,24 +1289,6 @@ public:
|
|||
const Corner *corner);
|
||||
PwrActivity findClkedActivity(const Pin *pin);
|
||||
|
||||
void writeGateSpice(ArcDcalcArgSeq gates,
|
||||
const char *spice_filename,
|
||||
const char *subckt_filename,
|
||||
const char *lib_subckt_filename,
|
||||
const char *model_filename,
|
||||
const char *power_name,
|
||||
const char *gnd_name,
|
||||
CircuitSim ckt_sim,
|
||||
const Corner *corner,
|
||||
const MinMax *min_max);
|
||||
void writeGateGnuplot(ArcDcalcArgSeq gates,
|
||||
PinSet plot_pins,
|
||||
const char *spice_waveform_filename,
|
||||
const char *csv_filename,
|
||||
const char *gnuplot_filename,
|
||||
const Corner *corner,
|
||||
const MinMax *min_max);
|
||||
|
||||
void writeTimingModel(const char *lib_name,
|
||||
const char *cell_name,
|
||||
const char *filename,
|
||||
|
|
@ -1316,6 +1300,15 @@ public:
|
|||
LibertyLibrarySeq *map_libs);
|
||||
LibertyCellSeq *equivCells(LibertyCell *cell);
|
||||
|
||||
void writePathSpice(PathRef *path,
|
||||
const char *spice_filename,
|
||||
const char *subckt_filename,
|
||||
const char *lib_subckt_filename,
|
||||
const char *model_filename,
|
||||
const char *power_name,
|
||||
const char *gnd_name,
|
||||
CircuitSim ckt_sim);
|
||||
|
||||
protected:
|
||||
// Default constructors that are called by makeComponents in the Sta
|
||||
// constructor. These can be redefined by a derived class to
|
||||
|
|
|
|||
|
|
@ -182,19 +182,19 @@ liberty_supply_exists(const char *supply_name)
|
|||
LibertyLibraryIterator *
|
||||
liberty_library_iterator()
|
||||
{
|
||||
return cmdNetwork()->libertyLibraryIterator();
|
||||
return Sta::sta()->network()->libertyLibraryIterator();
|
||||
}
|
||||
|
||||
LibertyLibrary *
|
||||
find_liberty(const char *name)
|
||||
{
|
||||
return cmdNetwork()->findLiberty(name);
|
||||
return Sta::sta()->network()->findLiberty(name);
|
||||
}
|
||||
|
||||
LibertyCell *
|
||||
find_liberty_cell(const char *name)
|
||||
{
|
||||
return cmdNetwork()->findLibertyCell(name);
|
||||
return Sta::sta()->network()->findLibertyCell(name);
|
||||
}
|
||||
|
||||
bool
|
||||
|
|
|
|||
|
|
@ -158,13 +158,14 @@ private:
|
|||
bool
|
||||
network_is_linked()
|
||||
{
|
||||
return Sta::sta()->cmdNetwork()->isLinked();
|
||||
return Sta::sta()->network()->isLinked();
|
||||
}
|
||||
|
||||
void
|
||||
set_path_divider(char divider)
|
||||
{
|
||||
cmdNetwork()->setPathDivider(divider);
|
||||
Network *network = Sta::sta()->network();
|
||||
network->setPathDivider(divider);
|
||||
}
|
||||
|
||||
void
|
||||
|
|
@ -177,48 +178,50 @@ set_current_instance(Instance *inst)
|
|||
int
|
||||
network_instance_count()
|
||||
{
|
||||
Network *network = cmdNetwork();
|
||||
Network *network = Sta::sta()->ensureLinked();
|
||||
return network->instanceCount();
|
||||
}
|
||||
|
||||
int
|
||||
network_pin_count()
|
||||
{
|
||||
Network *network = cmdNetwork();
|
||||
Network *network = Sta::sta()->ensureLinked();
|
||||
return network->pinCount();
|
||||
}
|
||||
|
||||
int
|
||||
network_net_count()
|
||||
{
|
||||
Network *network = cmdNetwork();
|
||||
Network *network = Sta::sta()->ensureLinked();
|
||||
return network->netCount();
|
||||
}
|
||||
|
||||
int
|
||||
network_leaf_instance_count()
|
||||
{
|
||||
Network *network = cmdNetwork();
|
||||
Network *network = Sta::sta()->ensureLinked();
|
||||
return network->leafInstanceCount();
|
||||
}
|
||||
|
||||
int
|
||||
network_leaf_pin_count()
|
||||
{
|
||||
Network *network = cmdNetwork();
|
||||
Network *network = Sta::sta()->ensureLinked();
|
||||
return network->leafPinCount();
|
||||
}
|
||||
|
||||
Library *
|
||||
find_library(const char *name)
|
||||
{
|
||||
return cmdNetwork()->findLibrary(name);
|
||||
Network *network = Sta::sta()->ensureLinked();
|
||||
return network->findLibrary(name);
|
||||
}
|
||||
|
||||
LibraryIterator *
|
||||
library_iterator()
|
||||
{
|
||||
return cmdNetwork()->libraryIterator();
|
||||
Network *network = Sta::sta()->ensureLinked();
|
||||
return network->libraryIterator();
|
||||
}
|
||||
|
||||
CellSeq
|
||||
|
|
@ -226,7 +229,7 @@ find_cells_matching(const char *pattern,
|
|||
bool regexp,
|
||||
bool nocase)
|
||||
{
|
||||
Network *network = cmdNetwork();
|
||||
Network *network = Sta::sta()->ensureLinked();
|
||||
PatternMatch matcher(pattern, regexp, nocase, Sta::sta()->tclInterp());
|
||||
CellSeq matches;
|
||||
LibraryIterator *lib_iter = network->libraryIterator();
|
||||
|
|
@ -262,25 +265,27 @@ link_design_cmd(const char *top_cell_name,
|
|||
Instance *
|
||||
top_instance()
|
||||
{
|
||||
return cmdLinkedNetwork()->topInstance();
|
||||
Network *network = Sta::sta()->ensureLinked();
|
||||
return network->topInstance();
|
||||
}
|
||||
|
||||
LeafInstanceIterator *
|
||||
leaf_instance_iterator()
|
||||
{
|
||||
return cmdLinkedNetwork()->leafInstanceIterator();
|
||||
Network *network = Sta::sta()->ensureLinked();
|
||||
return network->leafInstanceIterator();
|
||||
}
|
||||
|
||||
const char *
|
||||
port_direction(const Port *port)
|
||||
{
|
||||
return cmdLinkedNetwork()->direction(port)->name();
|
||||
return Sta::sta()->ensureLinked()->direction(port)->name();
|
||||
}
|
||||
|
||||
const char *
|
||||
pin_direction(const Pin *pin)
|
||||
{
|
||||
return cmdLinkedNetwork()->direction(pin)->name();
|
||||
return Sta::sta()->ensureLinked()->direction(pin)->name();
|
||||
}
|
||||
|
||||
PortSeq
|
||||
|
|
@ -288,8 +293,9 @@ find_ports_matching(const char *pattern,
|
|||
bool regexp,
|
||||
bool nocase)
|
||||
{
|
||||
Network *network = cmdLinkedNetwork();
|
||||
PatternMatch matcher(pattern, regexp, nocase, Sta::sta()->tclInterp());
|
||||
Sta *sta = Sta::sta();
|
||||
Network *network = sta->ensureLinked();
|
||||
PatternMatch matcher(pattern, regexp, nocase, sta->tclInterp());
|
||||
Cell *top_cell = network->cell(network->topInstance());
|
||||
PortSeq matches1 = network->findPortsMatching(top_cell, &matcher);
|
||||
// Expand bus/bundle ports.
|
||||
|
|
@ -315,8 +321,9 @@ find_port_pins_matching(const char *pattern,
|
|||
bool regexp,
|
||||
bool nocase)
|
||||
{
|
||||
Network *network = cmdLinkedNetwork();
|
||||
PatternMatch matcher(pattern, regexp, nocase, Sta::sta()->tclInterp());
|
||||
Sta *sta = Sta::sta();
|
||||
Network *network = sta->ensureLinked();
|
||||
PatternMatch matcher(pattern, regexp, nocase, sta->tclInterp());
|
||||
Instance *top_inst = network->topInstance();
|
||||
Cell *top_cell = network->cell(top_inst);
|
||||
PortSeq ports = network->findPortsMatching(top_cell, &matcher);
|
||||
|
|
@ -345,13 +352,14 @@ find_port_pins_matching(const char *pattern,
|
|||
Pin *
|
||||
find_pin(const char *path_name)
|
||||
{
|
||||
return cmdLinkedNetwork()->findPin(path_name);
|
||||
Network *network = Sta::sta()->ensureLinked();
|
||||
return network->findPin(path_name);
|
||||
}
|
||||
|
||||
Pin *
|
||||
get_port_pin(const Port *port)
|
||||
{
|
||||
Network *network = cmdLinkedNetwork();
|
||||
Network *network = Sta::sta()->ensureLinked();
|
||||
return network->findPin(network->topInstance(), port);
|
||||
}
|
||||
|
||||
|
|
@ -361,8 +369,8 @@ find_pins_matching(const char *pattern,
|
|||
bool nocase)
|
||||
{
|
||||
Sta *sta = Sta::sta();
|
||||
Network *network = cmdLinkedNetwork();
|
||||
PatternMatch matcher(pattern, regexp, nocase, Sta::sta()->tclInterp());
|
||||
Network *network = sta->ensureLinked();
|
||||
PatternMatch matcher(pattern, regexp, nocase, sta->tclInterp());
|
||||
Instance *current_instance = sta->currentInstance();
|
||||
PinSeq matches = network->findPinsMatching(current_instance, &matcher);
|
||||
return matches;
|
||||
|
|
@ -374,9 +382,9 @@ find_pins_hier_matching(const char *pattern,
|
|||
bool nocase)
|
||||
{
|
||||
Sta *sta = Sta::sta();
|
||||
Network *network = cmdLinkedNetwork();
|
||||
Network *network = sta->ensureLinked();
|
||||
Instance *current_instance = sta->currentInstance();
|
||||
PatternMatch matcher(pattern, regexp, nocase, Sta::sta()->tclInterp());
|
||||
PatternMatch matcher(pattern, regexp, nocase, sta->tclInterp());
|
||||
PinSeq matches = network->findPinsHierMatching(current_instance, &matcher);
|
||||
return matches;
|
||||
}
|
||||
|
|
@ -384,13 +392,13 @@ find_pins_hier_matching(const char *pattern,
|
|||
Instance *
|
||||
find_instance(char *path_name)
|
||||
{
|
||||
return cmdLinkedNetwork()->findInstance(path_name);
|
||||
return Sta::sta()->ensureLinked()->findInstance(path_name);
|
||||
}
|
||||
|
||||
InstanceSeq
|
||||
network_leaf_instances()
|
||||
{
|
||||
return cmdLinkedNetwork()->leafInstances();
|
||||
return Sta::sta()->ensureLinked()->leafInstances();
|
||||
}
|
||||
|
||||
InstanceSeq
|
||||
|
|
@ -399,9 +407,9 @@ find_instances_matching(const char *pattern,
|
|||
bool nocase)
|
||||
{
|
||||
Sta *sta = Sta::sta();
|
||||
Network *network = sta->ensureLinked();
|
||||
Instance *current_instance = sta->currentInstance();
|
||||
PatternMatch matcher(pattern, regexp, nocase, sta->tclInterp());
|
||||
Network *network = cmdLinkedNetwork();
|
||||
InstanceSeq matches = network->findInstancesMatching(current_instance, &matcher);
|
||||
return matches;
|
||||
}
|
||||
|
|
@ -412,7 +420,7 @@ find_instances_hier_matching(const char *pattern,
|
|||
bool nocase)
|
||||
{
|
||||
Sta *sta = Sta::sta();
|
||||
Network *network = cmdLinkedNetwork();
|
||||
Network *network = sta->ensureLinked();
|
||||
Instance *current_instance = sta->currentInstance();
|
||||
PatternMatch matcher(pattern, regexp, nocase, sta->tclInterp());
|
||||
InstanceSeq matches = network->findInstancesHierMatching(current_instance, &matcher);
|
||||
|
|
@ -425,10 +433,10 @@ find_register_instances(ClockSet *clks,
|
|||
bool edge_triggered,
|
||||
bool latches)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
InstanceSet insts = Sta::sta()->findRegisterInstances(clks, clk_tr,
|
||||
edge_triggered,
|
||||
latches);
|
||||
Sta *sta = Sta::sta();
|
||||
InstanceSet insts = sta->findRegisterInstances(clks, clk_tr,
|
||||
edge_triggered,
|
||||
latches);
|
||||
delete clks;
|
||||
return insts;
|
||||
}
|
||||
|
|
@ -439,9 +447,9 @@ find_register_data_pins(ClockSet *clks,
|
|||
bool edge_triggered,
|
||||
bool latches)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
PinSet pins = Sta::sta()->findRegisterDataPins(clks, clk_tr,
|
||||
edge_triggered, latches);
|
||||
Sta *sta = Sta::sta();
|
||||
PinSet pins = sta->findRegisterDataPins(clks, clk_tr,
|
||||
edge_triggered, latches);
|
||||
delete clks;
|
||||
return pins;
|
||||
}
|
||||
|
|
@ -452,9 +460,9 @@ find_register_clk_pins(ClockSet *clks,
|
|||
bool edge_triggered,
|
||||
bool latches)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
PinSet pins = Sta::sta()->findRegisterClkPins(clks, clk_tr,
|
||||
edge_triggered, latches);
|
||||
Sta *sta = Sta::sta();
|
||||
PinSet pins = sta->findRegisterClkPins(clks, clk_tr,
|
||||
edge_triggered, latches);
|
||||
delete clks;
|
||||
return pins;
|
||||
}
|
||||
|
|
@ -465,9 +473,9 @@ find_register_async_pins(ClockSet *clks,
|
|||
bool edge_triggered,
|
||||
bool latches)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
PinSet pins = Sta::sta()->findRegisterAsyncPins(clks, clk_tr,
|
||||
edge_triggered, latches);
|
||||
Sta *sta = Sta::sta();
|
||||
PinSet pins = sta->findRegisterAsyncPins(clks, clk_tr,
|
||||
edge_triggered, latches);
|
||||
delete clks;
|
||||
return pins;
|
||||
}
|
||||
|
|
@ -478,9 +486,9 @@ find_register_output_pins(ClockSet *clks,
|
|||
bool edge_triggered,
|
||||
bool latches)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
PinSet pins = Sta::sta()->findRegisterOutputPins(clks, clk_tr,
|
||||
edge_triggered, latches);
|
||||
Sta *sta = Sta::sta();
|
||||
PinSet pins = sta->findRegisterOutputPins(clks, clk_tr,
|
||||
edge_triggered, latches);
|
||||
delete clks;
|
||||
return pins;
|
||||
}
|
||||
|
|
@ -488,7 +496,7 @@ find_register_output_pins(ClockSet *clks,
|
|||
Net *
|
||||
find_net(char *path_name)
|
||||
{
|
||||
return cmdLinkedNetwork()->findNet(path_name);
|
||||
return Sta::sta()->ensureLinked()->findNet(path_name);
|
||||
}
|
||||
|
||||
NetSeq
|
||||
|
|
@ -496,9 +504,10 @@ find_nets_matching(const char *pattern,
|
|||
bool regexp,
|
||||
bool nocase)
|
||||
{
|
||||
Network *network = cmdLinkedNetwork();
|
||||
Instance *current_instance = Sta::sta()->currentInstance();
|
||||
PatternMatch matcher(pattern, regexp, nocase, Sta::sta()->tclInterp());
|
||||
Sta *sta = Sta::sta();
|
||||
Network *network = sta->ensureLinked();
|
||||
Instance *current_instance = sta->currentInstance();
|
||||
PatternMatch matcher(pattern, regexp, nocase, sta->tclInterp());
|
||||
NetSeq matches = network->findNetsMatching(current_instance, &matcher);
|
||||
return matches;
|
||||
}
|
||||
|
|
@ -508,9 +517,10 @@ find_nets_hier_matching(const char *pattern,
|
|||
bool regexp,
|
||||
bool nocase)
|
||||
{
|
||||
Network *network = cmdLinkedNetwork();
|
||||
Instance *current_instance = Sta::sta()->currentInstance();
|
||||
PatternMatch matcher(pattern, regexp, nocase, Sta::sta()->tclInterp());
|
||||
Sta *sta = Sta::sta();
|
||||
Network *network = sta->ensureLinked();
|
||||
Instance *current_instance = sta->currentInstance();
|
||||
PatternMatch matcher(pattern, regexp, nocase, sta->tclInterp());
|
||||
NetSeq matches = network->findNetsHierMatching(current_instance, &matcher);
|
||||
return matches;
|
||||
}
|
||||
|
|
@ -518,7 +528,7 @@ find_nets_hier_matching(const char *pattern,
|
|||
PinSet
|
||||
net_driver_pins(Net *net)
|
||||
{
|
||||
Network *network = cmdLinkedNetwork();
|
||||
Network *network = Sta::sta()->ensureLinked();
|
||||
PinSet pins(network);
|
||||
NetConnectedPinIterator *pin_iter = network->connectedPinIterator(net);
|
||||
while (pin_iter->hasNext()) {
|
||||
|
|
@ -533,7 +543,7 @@ net_driver_pins(Net *net)
|
|||
PinSet
|
||||
net_load_pins(Net *net)
|
||||
{
|
||||
Network *network = cmdLinkedNetwork();
|
||||
Network *network = Sta::sta()->ensureLinked();
|
||||
PinSet pins(network);
|
||||
NetConnectedPinIterator *pin_iter = network->connectedPinIterator(net);
|
||||
while (pin_iter->hasNext()) {
|
||||
|
|
@ -548,7 +558,7 @@ net_load_pins(Net *net)
|
|||
const char *
|
||||
pin_location(const Pin *pin)
|
||||
{
|
||||
Network *network = cmdNetwork();
|
||||
Network *network = Sta::sta()->ensureLinked();
|
||||
double x, y;
|
||||
bool exists;
|
||||
network->location(pin, x, y, exists);
|
||||
|
|
@ -562,7 +572,7 @@ pin_location(const Pin *pin)
|
|||
const char *
|
||||
port_location(const Port *port)
|
||||
{
|
||||
Network *network = cmdNetwork();
|
||||
Network *network = Sta::sta()->ensureLinked();
|
||||
const Pin *pin = network->findPin(network->topInstance(), port);
|
||||
return pin_location(pin);
|
||||
}
|
||||
|
|
@ -578,13 +588,13 @@ port_location(const Port *port)
|
|||
%extend Library {
|
||||
const char *name()
|
||||
{
|
||||
return cmdNetwork()->name(self);
|
||||
return Sta::sta()->ensureLinked()->name(self);
|
||||
}
|
||||
|
||||
Cell *
|
||||
find_cell(const char *name)
|
||||
{
|
||||
return cmdNetwork()->findCell(self, name);
|
||||
return Sta::sta()->ensureLinked()->findCell(self, name);
|
||||
}
|
||||
|
||||
CellSeq
|
||||
|
|
@ -592,8 +602,10 @@ find_cells_matching(const char *pattern,
|
|||
bool regexp,
|
||||
bool nocase)
|
||||
{
|
||||
PatternMatch matcher(pattern, regexp, nocase, Sta::sta()->tclInterp());
|
||||
CellSeq matches = cmdNetwork()->findCellsMatching(self, &matcher);
|
||||
Sta *sta = Sta::sta();
|
||||
Network *network = sta->ensureLinked();
|
||||
PatternMatch matcher(pattern, regexp, nocase, sta->tclInterp());
|
||||
CellSeq matches = network->findCellsMatching(self, &matcher);
|
||||
return matches;
|
||||
}
|
||||
|
||||
|
|
@ -606,18 +618,18 @@ void finish() { delete self; }
|
|||
} // LibraryIterator methods
|
||||
|
||||
%extend Cell {
|
||||
const char *name() { return cmdNetwork()->name(self); }
|
||||
Library *library() { return cmdNetwork()->library(self); }
|
||||
LibertyCell *liberty_cell() { return cmdNetwork()->libertyCell(self); }
|
||||
bool is_leaf() { return cmdNetwork()->isLeaf(self); }
|
||||
const char *name() { return Sta::sta()->ensureLinked()->name(self); }
|
||||
Library *library() { return Sta::sta()->ensureLinked()->library(self); }
|
||||
LibertyCell *liberty_cell() { return Sta::sta()->ensureLinked()->libertyCell(self); }
|
||||
bool is_leaf() { return Sta::sta()->ensureLinked()->isLeaf(self); }
|
||||
CellPortIterator *
|
||||
port_iterator() { return cmdNetwork()->portIterator(self); }
|
||||
string get_attribute(const char *key) { return cmdNetwork()->getAttribute(self, key); }
|
||||
port_iterator() { return Sta::sta()->ensureLinked()->portIterator(self); }
|
||||
string get_attribute(const char *key) { return Sta::sta()->ensureLinked()->getAttribute(self, key); }
|
||||
|
||||
Port *
|
||||
find_port(const char *name)
|
||||
{
|
||||
return cmdNetwork()->findPort(self, name);
|
||||
return Sta::sta()->ensureLinked()->findPort(self, name);
|
||||
}
|
||||
|
||||
PortSeq
|
||||
|
|
@ -625,8 +637,10 @@ find_ports_matching(const char *pattern,
|
|||
bool regexp,
|
||||
bool nocase)
|
||||
{
|
||||
PatternMatch matcher(pattern, regexp, nocase, Sta::sta()->tclInterp());
|
||||
return cmdNetwork()->findPortsMatching(self, &matcher);
|
||||
Sta *sta = Sta::sta();
|
||||
Network *network = sta->ensureLinked();
|
||||
PatternMatch matcher(pattern, regexp, nocase, sta->tclInterp());
|
||||
return network->findPortsMatching(self, &matcher);
|
||||
}
|
||||
|
||||
} // Cell methods
|
||||
|
|
@ -638,12 +652,12 @@ void finish() { delete self; }
|
|||
} // CellPortIterator methods
|
||||
|
||||
%extend Port {
|
||||
const char *bus_name() { return cmdNetwork()->busName(self); }
|
||||
Cell *cell() { return cmdNetwork()->cell(self); }
|
||||
LibertyPort *liberty_port() { return cmdNetwork()->libertyPort(self); }
|
||||
bool is_bus() { return cmdNetwork()->isBus(self); }
|
||||
const char *bus_name() { return Sta::sta()->ensureLinked()->busName(self); }
|
||||
Cell *cell() { return Sta::sta()->ensureLinked()->cell(self); }
|
||||
LibertyPort *liberty_port() { return Sta::sta()->ensureLinked()->libertyPort(self); }
|
||||
bool is_bus() { return Sta::sta()->ensureLinked()->isBus(self); }
|
||||
PortMemberIterator *
|
||||
member_iterator() { return cmdNetwork()->memberIterator(self); }
|
||||
member_iterator() { return Sta::sta()->ensureLinked()->memberIterator(self); }
|
||||
|
||||
} // Port methods
|
||||
|
||||
|
|
@ -654,22 +668,22 @@ void finish() { delete self; }
|
|||
} // PortMemberIterator methods
|
||||
|
||||
%extend Instance {
|
||||
Instance *parent() { return cmdLinkedNetwork()->parent(self); }
|
||||
Cell *cell() { return cmdLinkedNetwork()->cell(self); }
|
||||
LibertyCell *liberty_cell() { return cmdLinkedNetwork()->libertyCell(self); }
|
||||
bool is_leaf() { return cmdLinkedNetwork()->isLeaf(self); }
|
||||
Instance *parent() { return Sta::sta()->ensureLinked()->parent(self); }
|
||||
Cell *cell() { return Sta::sta()->ensureLinked()->cell(self); }
|
||||
LibertyCell *liberty_cell() { return Sta::sta()->ensureLinked()->libertyCell(self); }
|
||||
bool is_leaf() { return Sta::sta()->ensureLinked()->isLeaf(self); }
|
||||
InstanceChildIterator *
|
||||
child_iterator() { return cmdLinkedNetwork()->childIterator(self); }
|
||||
child_iterator() { return Sta::sta()->ensureLinked()->childIterator(self); }
|
||||
InstancePinIterator *
|
||||
pin_iterator() { return cmdLinkedNetwork()->pinIterator(self); }
|
||||
pin_iterator() { return Sta::sta()->ensureLinked()->pinIterator(self); }
|
||||
InstanceNetIterator *
|
||||
net_iterator() { return cmdLinkedNetwork()->netIterator(self); }
|
||||
net_iterator() { return Sta::sta()->ensureLinked()->netIterator(self); }
|
||||
Pin *
|
||||
find_pin(const char *name)
|
||||
{
|
||||
return cmdLinkedNetwork()->findPin(self, name);
|
||||
return Sta::sta()->ensureLinked()->findPin(self, name);
|
||||
}
|
||||
string get_attribute(const char *key) { return cmdNetwork()->getAttribute(self, key); }
|
||||
string get_attribute(const char *key) { return Sta::sta()->ensureLinked()->getAttribute(self, key); }
|
||||
} // Instance methods
|
||||
|
||||
%extend InstanceChildIterator {
|
||||
|
|
@ -697,19 +711,19 @@ void finish() { delete self; }
|
|||
} // InstanceNetIterator methods
|
||||
|
||||
%extend Pin {
|
||||
const char *port_name() { return cmdLinkedNetwork()->portName(self); }
|
||||
Instance *instance() { return cmdLinkedNetwork()->instance(self); }
|
||||
Net *net() { return cmdLinkedNetwork()->net(self); }
|
||||
Port *port() { return cmdLinkedNetwork()->port(self); }
|
||||
Term *term() { return cmdLinkedNetwork()->term(self); }
|
||||
LibertyPort *liberty_port() { return cmdLinkedNetwork()->libertyPort(self); }
|
||||
bool is_driver() { return cmdLinkedNetwork()->isDriver(self); }
|
||||
bool is_load() { return cmdLinkedNetwork()->isLoad(self); }
|
||||
bool is_leaf() { return cmdLinkedNetwork()->isLeaf(self); }
|
||||
bool is_hierarchical() { return cmdLinkedNetwork()->isHierarchical(self); }
|
||||
bool is_top_level_port() { return cmdLinkedNetwork()->isTopLevelPort(self); }
|
||||
const char *port_name() { return Sta::sta()->ensureLinked()->portName(self); }
|
||||
Instance *instance() { return Sta::sta()->ensureLinked()->instance(self); }
|
||||
Net *net() { return Sta::sta()->ensureLinked()->net(self); }
|
||||
Port *port() { return Sta::sta()->ensureLinked()->port(self); }
|
||||
Term *term() { return Sta::sta()->ensureLinked()->term(self); }
|
||||
LibertyPort *liberty_port() { return Sta::sta()->ensureLinked()->libertyPort(self); }
|
||||
bool is_driver() { return Sta::sta()->ensureLinked()->isDriver(self); }
|
||||
bool is_load() { return Sta::sta()->ensureLinked()->isLoad(self); }
|
||||
bool is_leaf() { return Sta::sta()->ensureLinked()->isLeaf(self); }
|
||||
bool is_hierarchical() { return Sta::sta()->ensureLinked()->isHierarchical(self); }
|
||||
bool is_top_level_port() { return Sta::sta()->ensureLinked()->isTopLevelPort(self); }
|
||||
PinConnectedPinIterator *connected_pin_iterator()
|
||||
{ return cmdLinkedNetwork()->connectedPinIterator(self); }
|
||||
{ return Sta::sta()->ensureLinked()->connectedPinIterator(self); }
|
||||
|
||||
Vertex **
|
||||
vertices()
|
||||
|
|
@ -717,7 +731,8 @@ vertices()
|
|||
Vertex *vertex, *vertex_bidirect_drvr;
|
||||
static Vertex *vertices[3];
|
||||
|
||||
cmdGraph()->pinVertices(self, vertex, vertex_bidirect_drvr);
|
||||
Graph *graph = Sta::sta()->ensureGraph();
|
||||
graph->pinVertices(self, vertex, vertex_bidirect_drvr);
|
||||
vertices[0] = vertex;
|
||||
vertices[1] = vertex_bidirect_drvr;
|
||||
vertices[2] = nullptr;
|
||||
|
|
@ -733,28 +748,29 @@ void finish() { delete self; }
|
|||
} // PinConnectedPinIterator methods
|
||||
|
||||
%extend Term {
|
||||
Net *net() { return cmdLinkedNetwork()->net(self); }
|
||||
Pin *pin() { return cmdLinkedNetwork()->pin(self); }
|
||||
Net *net() { return Sta::sta()->ensureLinked()->net(self); }
|
||||
Pin *pin() { return Sta::sta()->ensureLinked()->pin(self); }
|
||||
} // Term methods
|
||||
|
||||
%extend Net {
|
||||
Instance *instance() { return cmdLinkedNetwork()->instance(self); }
|
||||
Instance *instance() { return Sta::sta()->ensureLinked()->instance(self); }
|
||||
const Net *highest_connected_net()
|
||||
{ return cmdLinkedNetwork()->highestConnectedNet(self); }
|
||||
NetPinIterator *pin_iterator() { return cmdLinkedNetwork()->pinIterator(self);}
|
||||
NetTermIterator *term_iterator() {return cmdLinkedNetwork()->termIterator(self);}
|
||||
{ return Sta::sta()->ensureLinked()->highestConnectedNet(self); }
|
||||
NetPinIterator *pin_iterator() { return Sta::sta()->ensureLinked()->pinIterator(self);}
|
||||
NetTermIterator *term_iterator() {return Sta::sta()->ensureLinked()->termIterator(self);}
|
||||
NetConnectedPinIterator *connected_pin_iterator()
|
||||
{ return cmdLinkedNetwork()->connectedPinIterator(self); }
|
||||
bool is_power() { return cmdLinkedNetwork()->isPower(self);}
|
||||
bool is_ground() { return cmdLinkedNetwork()->isGround(self);}
|
||||
{ return Sta::sta()->ensureLinked()->connectedPinIterator(self); }
|
||||
bool is_power() { return Sta::sta()->ensureLinked()->isPower(self);}
|
||||
bool is_ground() { return Sta::sta()->ensureLinked()->isGround(self);}
|
||||
|
||||
float
|
||||
capacitance(Corner *corner,
|
||||
const MinMax *min_max)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta *sta = Sta::sta();
|
||||
Network *network = sta->ensureLinked();
|
||||
float pin_cap, wire_cap;
|
||||
Sta::sta()->connectedCap(self, corner, min_max, pin_cap, wire_cap);
|
||||
sta->connectedCap(self, corner, min_max, pin_cap, wire_cap);
|
||||
return pin_cap + wire_cap;
|
||||
}
|
||||
|
||||
|
|
@ -762,9 +778,10 @@ float
|
|||
pin_capacitance(Corner *corner,
|
||||
const MinMax *min_max)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta *sta = Sta::sta();
|
||||
sta->ensureLinked();
|
||||
float pin_cap, wire_cap;
|
||||
Sta::sta()->connectedCap(self, corner, min_max, pin_cap, wire_cap);
|
||||
sta->connectedCap(self, corner, min_max, pin_cap, wire_cap);
|
||||
return pin_cap;
|
||||
}
|
||||
|
||||
|
|
@ -772,9 +789,10 @@ float
|
|||
wire_capacitance(Corner *corner,
|
||||
const MinMax *min_max)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta *sta = Sta::sta();
|
||||
sta->ensureLinked();
|
||||
float pin_cap, wire_cap;
|
||||
Sta::sta()->connectedCap(self, corner, min_max, pin_cap, wire_cap);
|
||||
sta->connectedCap(self, corner, min_max, pin_cap, wire_cap);
|
||||
return wire_cap;
|
||||
}
|
||||
|
||||
|
|
@ -782,7 +800,7 @@ wire_capacitance(Corner *corner,
|
|||
PortSeq
|
||||
ports()
|
||||
{
|
||||
Network *network = cmdLinkedNetwork();
|
||||
Network *network = Sta::sta()->ensureLinked();
|
||||
PortSeq ports;
|
||||
if (network->isTopInstance(network->instance(self))) {
|
||||
NetTermIterator *term_iter = network->termIterator(self);
|
||||
|
|
|
|||
|
|
@ -24,11 +24,6 @@ using sta::Port;
|
|||
using sta::Pin;
|
||||
using sta::NetworkEdit;
|
||||
|
||||
namespace sta {
|
||||
NetworkEdit *
|
||||
cmdEditNetwork();
|
||||
}
|
||||
|
||||
%}
|
||||
|
||||
////////////////////////////////////////////////////////////////
|
||||
|
|
@ -64,16 +59,14 @@ Net *
|
|||
make_net_cmd(const char *name,
|
||||
Instance *parent)
|
||||
{
|
||||
Net *net = sta::cmdEditNetwork()->makeNet(name, parent);
|
||||
// Sta notification unnecessary.
|
||||
return net;
|
||||
return Sta::sta()->makeNet(name, parent);
|
||||
}
|
||||
|
||||
void
|
||||
make_port_pin_cmd(const char *port_name,
|
||||
const char *direction)
|
||||
PortDirection *dir)
|
||||
{
|
||||
Sta::sta()->makePortPin(port_name, direction);
|
||||
Sta::sta()->makePortPin(port_name, dir);
|
||||
}
|
||||
|
||||
void
|
||||
|
|
|
|||
|
|
@ -52,6 +52,12 @@ NetworkNameAdapter::topInstance() const
|
|||
return network_->topInstance();
|
||||
}
|
||||
|
||||
LibertyLibrary *
|
||||
NetworkNameAdapter::defaultLibertyLibrary() const
|
||||
{
|
||||
return network_->defaultLibertyLibrary();
|
||||
}
|
||||
|
||||
LibraryIterator *
|
||||
NetworkNameAdapter::libraryIterator() const
|
||||
{
|
||||
|
|
|
|||
|
|
@ -20,7 +20,6 @@
|
|||
#include "Sta.hh"
|
||||
|
||||
using sta::Sta;
|
||||
using sta::cmdLinkedNetwork;
|
||||
using sta::Instance;
|
||||
using sta::MinMaxAll;
|
||||
using sta::RiseFall;
|
||||
|
|
@ -40,7 +39,6 @@ read_spef_cmd(const char *filename,
|
|||
float coupling_cap_factor,
|
||||
bool reduce)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
return Sta::sta()->readSpef(filename, instance, corner, min_max,
|
||||
pin_cap_included, keep_coupling_caps,
|
||||
coupling_cap_factor, reduce);
|
||||
|
|
@ -50,7 +48,6 @@ void
|
|||
report_parasitic_annotation_cmd(bool report_unannotated,
|
||||
const Corner *corner)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta::sta()->reportParasiticAnnotation(report_unannotated, corner);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -42,7 +42,6 @@ pushPowerResultFloats(PowerResult &power,
|
|||
FloatSeq
|
||||
design_power(const Corner *corner)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
PowerResult total, sequential, combinational, clock, macro, pad;
|
||||
Sta::sta()->power(corner, total, sequential, combinational, clock, macro, pad);
|
||||
FloatSeq powers;
|
||||
|
|
@ -59,7 +58,6 @@ FloatSeq
|
|||
instance_power(Instance *inst,
|
||||
const Corner *corner)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta *sta = Sta::sta();
|
||||
PowerResult power = sta->power(inst, corner);
|
||||
FloatSeq powers;
|
||||
|
|
@ -111,7 +109,7 @@ read_vcd_file(const char *filename,
|
|||
const char *scope)
|
||||
{
|
||||
Sta *sta = Sta::sta();
|
||||
cmdLinkedNetwork();
|
||||
sta->ensureLinked();
|
||||
readVcdActivities(filename, scope, sta);
|
||||
}
|
||||
|
||||
|
|
@ -138,7 +136,7 @@ read_saif_file(const char *filename,
|
|||
const char *scope)
|
||||
{
|
||||
Sta *sta = Sta::sta();
|
||||
cmdLinkedNetwork();
|
||||
sta->ensureLinked();
|
||||
return readSaif(filename, scope, sta);
|
||||
}
|
||||
|
||||
|
|
|
|||
74
sdc/Sdc.i
74
sdc/Sdc.i
|
|
@ -87,7 +87,6 @@ write_sdc_cmd(const char *filename,
|
|||
bool gzip,
|
||||
bool no_timestamp)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta::sta()->writeSdc(filename, leaf, compatible, digits, gzip, no_timestamp);
|
||||
}
|
||||
|
||||
|
|
@ -143,7 +142,6 @@ set_instance_pvt(Instance *inst,
|
|||
float voltage,
|
||||
float temperature)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Pvt pvt(process, voltage, temperature);
|
||||
Sta::sta()->setPvt(inst, min_max, pvt);
|
||||
}
|
||||
|
|
@ -153,7 +151,6 @@ port_ext_pin_cap(const Port *port,
|
|||
const Corner *corner,
|
||||
const MinMax *min_max)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
float pin_cap, wire_cap;
|
||||
int fanout;
|
||||
Sta::sta()->portExtCaps(port, corner, min_max, pin_cap, wire_cap, fanout);
|
||||
|
|
@ -175,7 +172,6 @@ port_ext_wire_cap(const Port *port,
|
|||
const Corner *corner,
|
||||
const MinMax *min_max)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
float pin_cap, wire_cap;
|
||||
int fanout;
|
||||
Sta::sta()->portExtCaps(port, corner, min_max, pin_cap, wire_cap, fanout);
|
||||
|
|
@ -207,7 +203,6 @@ port_ext_fanout(const Port *port,
|
|||
const Corner *corner,
|
||||
const MinMax *min_max)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
float pin_cap, wire_cap;
|
||||
int fanout;
|
||||
Sta::sta()->portExtCaps(port, corner, min_max, pin_cap, wire_cap, fanout);
|
||||
|
|
@ -264,7 +259,6 @@ make_clock(const char *name,
|
|||
FloatSeq *waveform,
|
||||
char *comment)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta::sta()->makeClock(name, pins, add_to_pins, period, waveform, comment);
|
||||
}
|
||||
|
||||
|
|
@ -283,7 +277,6 @@ make_generated_clock(const char *name,
|
|||
FloatSeq *edge_shifts,
|
||||
char *comment)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta::sta()->makeGeneratedClock(name, pins, add_to_pins,
|
||||
src_pin, master_clk,
|
||||
divide_by, multiply_by, duty_cycle, invert,
|
||||
|
|
@ -294,35 +287,30 @@ make_generated_clock(const char *name,
|
|||
void
|
||||
remove_clock_cmd(Clock *clk)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta::sta()->removeClock(clk);
|
||||
}
|
||||
|
||||
void
|
||||
set_propagated_clock_cmd(Clock *clk)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta::sta()->setPropagatedClock(clk);
|
||||
}
|
||||
|
||||
void
|
||||
set_propagated_clock_pin_cmd(Pin *pin)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta::sta()->setPropagatedClock(pin);
|
||||
}
|
||||
|
||||
void
|
||||
unset_propagated_clock_cmd(Clock *clk)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta::sta()->removePropagatedClock(clk);
|
||||
}
|
||||
|
||||
void
|
||||
unset_propagated_clock_pin_cmd(Pin *pin)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta::sta()->removePropagatedClock(pin);
|
||||
}
|
||||
|
||||
|
|
@ -332,14 +320,12 @@ set_clock_slew_cmd(Clock *clk,
|
|||
const MinMaxAll *min_max,
|
||||
float slew)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta::sta()->setClockSlew(clk, rf, min_max, slew);
|
||||
}
|
||||
|
||||
void
|
||||
unset_clock_slew_cmd(Clock *clk)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta::sta()->removeClockSlew(clk);
|
||||
}
|
||||
|
||||
|
|
@ -349,7 +335,6 @@ set_clock_latency_cmd(Clock *clk,
|
|||
const RiseFallBoth *rf,
|
||||
MinMaxAll *min_max, float delay)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta::sta()->setClockLatency(clk, pin, rf, min_max, delay);
|
||||
}
|
||||
|
||||
|
|
@ -361,7 +346,6 @@ set_clock_insertion_cmd(Clock *clk,
|
|||
const EarlyLateAll *early_late,
|
||||
float delay)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta::sta()->setClockInsertion(clk, pin, rf, min_max, early_late, delay);
|
||||
}
|
||||
|
||||
|
|
@ -369,7 +353,6 @@ void
|
|||
unset_clock_latency_cmd(Clock *clk,
|
||||
Pin *pin)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta::sta()->removeClockLatency(clk, pin);
|
||||
}
|
||||
|
||||
|
|
@ -377,7 +360,6 @@ void
|
|||
unset_clock_insertion_cmd(Clock *clk,
|
||||
Pin *pin)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta::sta()->removeClockInsertion(clk, pin);
|
||||
}
|
||||
|
||||
|
|
@ -386,7 +368,6 @@ set_clock_uncertainty_clk(Clock *clk,
|
|||
const SetupHoldAll *setup_hold,
|
||||
float uncertainty)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta::sta()->setClockUncertainty(clk, setup_hold, uncertainty);
|
||||
}
|
||||
|
||||
|
|
@ -394,7 +375,6 @@ void
|
|||
unset_clock_uncertainty_clk(Clock *clk,
|
||||
const SetupHoldAll *setup_hold)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta::sta()->removeClockUncertainty(clk, setup_hold);
|
||||
}
|
||||
|
||||
|
|
@ -403,7 +383,6 @@ set_clock_uncertainty_pin(Pin *pin,
|
|||
const MinMaxAll *min_max,
|
||||
float uncertainty)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta::sta()->setClockUncertainty(pin, min_max, uncertainty);
|
||||
}
|
||||
|
||||
|
|
@ -411,7 +390,6 @@ void
|
|||
unset_clock_uncertainty_pin(Pin *pin,
|
||||
const MinMaxAll *min_max)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta::sta()->removeClockUncertainty(pin, min_max);
|
||||
}
|
||||
|
||||
|
|
@ -423,7 +401,6 @@ set_inter_clock_uncertainty(Clock *from_clk,
|
|||
const MinMaxAll *min_max,
|
||||
float uncertainty)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta::sta()->setClockUncertainty(from_clk, from_tr, to_clk, to_tr, min_max,
|
||||
uncertainty);
|
||||
}
|
||||
|
|
@ -435,7 +412,6 @@ unset_inter_clock_uncertainty(Clock *from_clk,
|
|||
const RiseFallBoth *to_tr,
|
||||
const MinMaxAll *min_max)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta::sta()->removeClockUncertainty(from_clk, from_tr, to_clk, to_tr, min_max);
|
||||
}
|
||||
|
||||
|
|
@ -511,7 +487,6 @@ set_input_delay_cmd(Pin *pin,
|
|||
bool add,
|
||||
float delay)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta::sta()->setInputDelay(pin, rf, clk, clk_rf, ref_pin,
|
||||
source_latency_included, network_latency_included,
|
||||
min_max, add, delay);
|
||||
|
|
@ -524,7 +499,6 @@ unset_input_delay_cmd(Pin *pin,
|
|||
RiseFall *clk_rf,
|
||||
MinMaxAll *min_max)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta::sta()->removeInputDelay(pin, rf, clk, clk_rf, min_max);
|
||||
}
|
||||
|
||||
|
|
@ -540,7 +514,6 @@ set_output_delay_cmd(Pin *pin,
|
|||
bool add,
|
||||
float delay)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta::sta()->setOutputDelay(pin, rf, clk, clk_rf, ref_pin,
|
||||
source_latency_included, network_latency_included,
|
||||
min_max, add, delay);
|
||||
|
|
@ -553,7 +526,6 @@ unset_output_delay_cmd(Pin *pin,
|
|||
RiseFall *clk_rf,
|
||||
MinMaxAll *min_max)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta::sta()->removeOutputDelay(pin, rf, clk, clk_rf, min_max);
|
||||
}
|
||||
|
||||
|
|
@ -562,7 +534,6 @@ disable_cell(LibertyCell *cell,
|
|||
LibertyPort *from,
|
||||
LibertyPort *to)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta::sta()->disable(cell, from, to);
|
||||
}
|
||||
|
||||
|
|
@ -571,35 +542,30 @@ unset_disable_cell(LibertyCell *cell,
|
|||
LibertyPort *from,
|
||||
LibertyPort *to)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta::sta()->removeDisable(cell, from, to);
|
||||
}
|
||||
|
||||
void
|
||||
disable_lib_port(LibertyPort *port)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta::sta()->disable(port);
|
||||
}
|
||||
|
||||
void
|
||||
unset_disable_lib_port(LibertyPort *port)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta::sta()->removeDisable(port);
|
||||
}
|
||||
|
||||
void
|
||||
disable_port(Port *port)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta::sta()->disable(port);
|
||||
}
|
||||
|
||||
void
|
||||
unset_disable_port(Port *port)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta::sta()->removeDisable(port);
|
||||
}
|
||||
|
||||
|
|
@ -608,7 +574,6 @@ disable_instance(Instance *instance,
|
|||
LibertyPort *from,
|
||||
LibertyPort *to)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta::sta()->disable(instance, from, to);
|
||||
}
|
||||
|
||||
|
|
@ -617,84 +582,72 @@ unset_disable_instance(Instance *instance,
|
|||
LibertyPort *from,
|
||||
LibertyPort *to)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta::sta()->removeDisable(instance, from, to);
|
||||
}
|
||||
|
||||
void
|
||||
disable_pin(Pin *pin)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta::sta()->disable(pin);
|
||||
}
|
||||
|
||||
void
|
||||
unset_disable_pin(Pin *pin)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta::sta()->removeDisable(pin);
|
||||
}
|
||||
|
||||
void
|
||||
disable_edge(Edge *edge)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta::sta()->disable(edge);
|
||||
}
|
||||
|
||||
void
|
||||
unset_disable_edge(Edge *edge)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta::sta()->removeDisable(edge);
|
||||
}
|
||||
|
||||
void
|
||||
disable_timing_arc_set(TimingArcSet *arc_set)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta::sta()->disable(arc_set);
|
||||
}
|
||||
|
||||
void
|
||||
unset_disable_timing_arc_set(TimingArcSet *arc_set)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta::sta()->removeDisable(arc_set);
|
||||
}
|
||||
|
||||
void
|
||||
disable_clock_gating_check_inst(Instance *inst)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta::sta()->disableClockGatingCheck(inst);
|
||||
}
|
||||
|
||||
void
|
||||
disable_clock_gating_check_pin(Pin *pin)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta::sta()->disableClockGatingCheck(pin);
|
||||
}
|
||||
|
||||
void
|
||||
unset_disable_clock_gating_check_inst(Instance *inst)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta::sta()->removeDisableClockGatingCheck(inst);
|
||||
}
|
||||
|
||||
void
|
||||
unset_disable_clock_gating_check_pin(Pin *pin)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta::sta()->removeDisableClockGatingCheck(pin);
|
||||
}
|
||||
|
||||
EdgeSeq
|
||||
disabled_edges_sorted()
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
return Sta::sta()->disabledEdgesSorted();
|
||||
}
|
||||
|
||||
|
|
@ -713,7 +666,6 @@ make_false_path(ExceptionFrom *from,
|
|||
const MinMaxAll *min_max,
|
||||
const char *comment)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta::sta()->makeFalsePath(from, thrus, to, min_max, comment);
|
||||
}
|
||||
|
||||
|
|
@ -726,7 +678,6 @@ make_multicycle_path(ExceptionFrom *from,
|
|||
int path_multiplier,
|
||||
const char *comment)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta::sta()->makeMulticyclePath(from, thrus, to, min_max, use_end_clk,
|
||||
path_multiplier, comment);
|
||||
}
|
||||
|
|
@ -740,7 +691,6 @@ make_path_delay(ExceptionFrom *from,
|
|||
float delay,
|
||||
const char *comment)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta::sta()->makePathDelay(from, thrus, to, min_max,
|
||||
ignore_clk_latency, delay, comment);
|
||||
}
|
||||
|
|
@ -751,7 +701,6 @@ reset_path_cmd(ExceptionFrom *
|
|||
ExceptionTo *to,
|
||||
const MinMaxAll *min_max)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta::sta()->resetPath(from, thrus, to, min_max);
|
||||
// from/to and thru are owned and deleted by the caller.
|
||||
// ExceptionThruSeq thrus arg is made by TclListSeqExceptionThru
|
||||
|
|
@ -767,7 +716,6 @@ make_group_path(const char *name,
|
|||
ExceptionTo *to,
|
||||
const char *comment)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
if (name[0] == '\0')
|
||||
name = nullptr;
|
||||
Sta::sta()->makeGroupPath(name, is_default, from, thrus, to, comment);
|
||||
|
|
@ -776,7 +724,6 @@ make_group_path(const char *name,
|
|||
bool
|
||||
is_path_group_name(const char *name)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
return Sta::sta()->isGroupPathName(name);
|
||||
}
|
||||
|
||||
|
|
@ -786,7 +733,6 @@ make_exception_from(PinSet *from_pins,
|
|||
InstanceSet *from_insts,
|
||||
const RiseFallBoth *from_tr)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
return Sta::sta()->makeExceptionFrom(from_pins, from_clks, from_insts,
|
||||
from_tr);
|
||||
}
|
||||
|
|
@ -811,7 +757,6 @@ make_exception_thru(PinSet *pins,
|
|||
InstanceSet *insts,
|
||||
const RiseFallBoth *rf)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
return Sta::sta()->makeExceptionThru(pins, nets, insts, rf);
|
||||
}
|
||||
|
||||
|
|
@ -828,7 +773,6 @@ make_exception_to(PinSet *to_pins,
|
|||
const RiseFallBoth *rf,
|
||||
RiseFallBoth *end_rf)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
return Sta::sta()->makeExceptionTo(to_pins, to_clks, to_insts, rf, end_rf);
|
||||
}
|
||||
|
||||
|
|
@ -918,7 +862,6 @@ set_input_slew_cmd(Port *port,
|
|||
const MinMaxAll *min_max,
|
||||
float slew)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta::sta()->setInputSlew(port, rf, min_max, slew);
|
||||
}
|
||||
|
||||
|
|
@ -946,7 +889,6 @@ set_drive_resistance_cmd(Port *port,
|
|||
const MinMaxAll *min_max,
|
||||
float res)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta::sta()->setDriveResistance(port, rf, min_max, res);
|
||||
}
|
||||
|
||||
|
|
@ -957,7 +899,6 @@ set_slew_limit_clk(Clock *clk,
|
|||
const MinMax *min_max,
|
||||
float slew)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta::sta()->setSlewLimit(clk, rf, clk_data, min_max, slew);
|
||||
}
|
||||
|
||||
|
|
@ -966,7 +907,6 @@ set_slew_limit_port(Port *port,
|
|||
const MinMax *min_max,
|
||||
float slew)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta::sta()->setSlewLimit(port, min_max, slew);
|
||||
}
|
||||
|
||||
|
|
@ -975,7 +915,6 @@ set_slew_limit_cell(Cell *cell,
|
|||
const MinMax *min_max,
|
||||
float slew)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta::sta()->setSlewLimit(cell, min_max, slew);
|
||||
}
|
||||
|
||||
|
|
@ -1147,7 +1086,6 @@ unset_timing_derate_cmd()
|
|||
Clock *
|
||||
find_clock(const char *name)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
return Sta::sta()->sdc()->findClock(name);
|
||||
}
|
||||
|
||||
|
|
@ -1168,7 +1106,6 @@ find_clocks_matching(const char *pattern,
|
|||
bool regexp,
|
||||
bool nocase)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta *sta = Sta::sta();
|
||||
Sdc *sdc = sta->sdc();
|
||||
PatternMatch matcher(pattern, regexp, nocase, sta->tclInterp());
|
||||
|
|
@ -1178,22 +1115,19 @@ find_clocks_matching(const char *pattern,
|
|||
void
|
||||
update_generated_clks()
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta::sta()->updateGeneratedClks();
|
||||
}
|
||||
|
||||
bool
|
||||
is_clock(Pin *pin)
|
||||
{
|
||||
Sta *sta = Sta::sta();
|
||||
return sta->isClock(pin);
|
||||
return Sta::sta()->isClock(pin);
|
||||
}
|
||||
|
||||
bool
|
||||
is_ideal_clock(Pin *pin)
|
||||
{
|
||||
Sta *sta = Sta::sta();
|
||||
return sta->isIdealClock(pin);
|
||||
return Sta::sta()->isIdealClock(pin);
|
||||
}
|
||||
|
||||
bool
|
||||
|
|
@ -1258,7 +1192,7 @@ PortSeq
|
|||
all_inputs_cmd(bool no_clocks)
|
||||
{
|
||||
Sta *sta = Sta::sta();
|
||||
cmdLinkedNetwork();
|
||||
sta->ensureLinked();
|
||||
return sta->sdc()->allInputs(no_clocks);
|
||||
}
|
||||
|
||||
|
|
@ -1266,7 +1200,7 @@ PortSeq
|
|||
all_outputs_cmd()
|
||||
{
|
||||
Sta *sta = Sta::sta();
|
||||
cmdLinkedNetwork();
|
||||
sta->ensureLinked();
|
||||
return sta->sdc()->allOutputs();
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -24,7 +24,6 @@
|
|||
#include "Sta.hh"
|
||||
|
||||
using sta::Sta;
|
||||
using sta::cmdLinkedNetwork;
|
||||
using sta::AnalysisType;
|
||||
using sta::MinMax;
|
||||
using sta::MinMaxAllNull;
|
||||
|
|
@ -51,8 +50,8 @@ read_sdf_file(const char *filename,
|
|||
bool incremental_only,
|
||||
MinMaxAllNull *cond_use)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta *sta = Sta::sta();
|
||||
sta->ensureLinked();
|
||||
sta->ensureGraph();
|
||||
if (stringEq(path, ""))
|
||||
path = NULL;
|
||||
|
|
@ -72,8 +71,8 @@ report_annotated_delay_cmd(bool report_cells,
|
|||
bool list_not_annotated,
|
||||
bool report_constant_arcs)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta *sta = Sta::sta();
|
||||
sta->ensureLinked();
|
||||
sta->ensureGraph();
|
||||
reportAnnotatedDelay(report_cells, report_nets,
|
||||
report_in_ports, report_out_ports,
|
||||
|
|
@ -95,8 +94,8 @@ report_annotated_check_cmd(bool report_setup,
|
|||
bool list_not_annotated,
|
||||
bool report_constant_arcs)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta *sta = Sta::sta();
|
||||
sta->ensureLinked();
|
||||
sta->ensureGraph();
|
||||
reportAnnotatedCheck(report_setup, report_hold,
|
||||
report_recovery, report_removal,
|
||||
|
|
@ -116,8 +115,8 @@ write_sdf_cmd(char *filename,
|
|||
bool no_timestamp,
|
||||
bool no_version)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta *sta = Sta::sta();
|
||||
sta->ensureLinked();
|
||||
sta->writeSdf(filename, corner, divider, include_typ, digits, gzip,
|
||||
no_timestamp, no_version);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -680,7 +680,7 @@ getProperty(const Library *lib,
|
|||
const char *property,
|
||||
Sta *sta)
|
||||
{
|
||||
auto network = sta->cmdNetwork();
|
||||
Network *network = sta->ensureLinked();
|
||||
if (stringEqual(property, "name")
|
||||
|| stringEqual(property, "full_name"))
|
||||
return PropertyValue(network->name(lib));
|
||||
|
|
@ -711,7 +711,7 @@ getProperty(const LibertyCell *cell,
|
|||
|| stringEqual(property, "base_name"))
|
||||
return PropertyValue(cell->name());
|
||||
else if (stringEqual(property, "full_name")) {
|
||||
auto network = sta->cmdNetwork();
|
||||
Network *network = sta->ensureLinked();
|
||||
auto lib = cell->libertyLibrary();
|
||||
string lib_name = lib->name();
|
||||
string cell_name = cell->name();
|
||||
|
|
@ -741,7 +741,7 @@ getProperty(const Cell *cell,
|
|||
const char *property,
|
||||
Sta *sta)
|
||||
{
|
||||
auto network = sta->cmdNetwork();
|
||||
Network *network = sta->ensureLinked();
|
||||
if (stringEqual(property, "name")
|
||||
|| stringEqual(property, "base_name"))
|
||||
return PropertyValue(network->name(cell));
|
||||
|
|
@ -767,7 +767,7 @@ getProperty(const Port *port,
|
|||
const char *property,
|
||||
Sta *sta)
|
||||
{
|
||||
auto network = sta->cmdNetwork();
|
||||
Network *network = sta->ensureLinked();
|
||||
if (stringEqual(property, "name")
|
||||
|| stringEqual(property, "full_name"))
|
||||
return PropertyValue(network->name(port));
|
||||
|
|
@ -819,7 +819,7 @@ portSlewProperty(const Port *port,
|
|||
const MinMax *min_max,
|
||||
Sta *sta)
|
||||
{
|
||||
auto network = sta->cmdNetwork();
|
||||
Network *network = sta->ensureLinked();
|
||||
Instance *top_inst = network->topInstance();
|
||||
Pin *pin = network->findPin(top_inst, port);
|
||||
return pinSlewProperty(pin, min_max, sta);
|
||||
|
|
@ -831,7 +831,7 @@ portSlewProperty(const Port *port,
|
|||
const MinMax *min_max,
|
||||
Sta *sta)
|
||||
{
|
||||
auto network = sta->cmdNetwork();
|
||||
Network *network = sta->ensureLinked();
|
||||
Instance *top_inst = network->topInstance();
|
||||
Pin *pin = network->findPin(top_inst, port);
|
||||
return pinSlewProperty(pin, rf, min_max, sta);
|
||||
|
|
@ -842,7 +842,7 @@ portSlackProperty(const Port *port,
|
|||
const MinMax *min_max,
|
||||
Sta *sta)
|
||||
{
|
||||
auto network = sta->cmdNetwork();
|
||||
Network *network = sta->ensureLinked();
|
||||
Instance *top_inst = network->topInstance();
|
||||
Pin *pin = network->findPin(top_inst, port);
|
||||
return pinSlackProperty(pin, min_max, sta);
|
||||
|
|
@ -854,7 +854,7 @@ portSlackProperty(const Port *port,
|
|||
const MinMax *min_max,
|
||||
Sta *sta)
|
||||
{
|
||||
auto network = sta->cmdNetwork();
|
||||
Network *network = sta->ensureLinked();
|
||||
Instance *top_inst = network->topInstance();
|
||||
Pin *pin = network->findPin(top_inst, port);
|
||||
return pinSlackProperty(pin, rf, min_max, sta);
|
||||
|
|
@ -937,7 +937,7 @@ getProperty(const Instance *inst,
|
|||
const char *property,
|
||||
Sta *sta)
|
||||
{
|
||||
auto network = sta->cmdNetwork();
|
||||
Network *network = sta->ensureLinked();
|
||||
LibertyCell *liberty_cell = network->libertyCell(inst);
|
||||
if (stringEqual(property, "name"))
|
||||
return PropertyValue(network->name(inst));
|
||||
|
|
@ -972,7 +972,7 @@ getProperty(const Pin *pin,
|
|||
const char *property,
|
||||
Sta *sta)
|
||||
{
|
||||
auto network = sta->cmdNetwork();
|
||||
Network *network = sta->ensureLinked();
|
||||
if (stringEqual(property, "name")
|
||||
|| stringEqual(property, "lib_pin_name"))
|
||||
return PropertyValue(network->portName(pin));
|
||||
|
|
@ -1122,7 +1122,7 @@ getProperty(const Net *net,
|
|||
const char *property,
|
||||
Sta *sta)
|
||||
{
|
||||
auto network = sta->cmdNetwork();
|
||||
Network *network = sta->ensureLinked();
|
||||
if (stringEqual(property, "name"))
|
||||
return PropertyValue(network->name(net));
|
||||
else if (stringEqual(property, "full_name"))
|
||||
|
|
@ -1139,8 +1139,8 @@ getProperty(Edge *edge,
|
|||
Sta *sta)
|
||||
{
|
||||
if (stringEqual(property, "full_name")) {
|
||||
auto network = sta->cmdNetwork();
|
||||
auto graph = sta->graph();
|
||||
Network *network = sta->ensureLinked();
|
||||
Graph *graph = sta->ensureGraph();
|
||||
const char *from = edge->from(graph)->name(network);
|
||||
const char *to = edge->to(graph)->name(network);
|
||||
string full_name;
|
||||
|
|
|
|||
126
search/Search.i
126
search/Search.i
|
|
@ -25,62 +25,6 @@
|
|||
#include "search/ReportPath.hh"
|
||||
#include "Sta.hh"
|
||||
|
||||
namespace sta {
|
||||
|
||||
////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// C++ helper functions used by the interface functions.
|
||||
// These are not visible in the TCL API.
|
||||
//
|
||||
////////////////////////////////////////////////////////////////
|
||||
|
||||
// Get the network for commands.
|
||||
Network *
|
||||
cmdNetwork()
|
||||
{
|
||||
return Sta::sta()->cmdNetwork();
|
||||
}
|
||||
|
||||
// Make sure the network has been read and linked.
|
||||
// Throwing an error means the caller doesn't have to check the result.
|
||||
Network *
|
||||
cmdLinkedNetwork()
|
||||
{
|
||||
Network *network = cmdNetwork();
|
||||
if (network->isLinked())
|
||||
return network;
|
||||
else {
|
||||
Report *report = Sta::sta()->report();
|
||||
report->error(1570, "no network has been linked.");
|
||||
return nullptr;
|
||||
}
|
||||
}
|
||||
|
||||
// Make sure an editable network has been read and linked.
|
||||
NetworkEdit *
|
||||
cmdEditNetwork()
|
||||
{
|
||||
Network *network = cmdLinkedNetwork();
|
||||
if (network->isEditable())
|
||||
return dynamic_cast<NetworkEdit*>(network);
|
||||
else {
|
||||
Report *report = Sta::sta()->report();
|
||||
report->error(1571, "network does not support edits.");
|
||||
return nullptr;
|
||||
}
|
||||
}
|
||||
|
||||
// Get the graph for commands.
|
||||
// Throw to cmd level on failure.
|
||||
Graph *
|
||||
cmdGraph()
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
return Sta::sta()->ensureGraph();
|
||||
}
|
||||
|
||||
} // namespace
|
||||
|
||||
using namespace sta;
|
||||
|
||||
%}
|
||||
|
|
@ -194,7 +138,6 @@ delete_all_memory()
|
|||
void
|
||||
find_timing_cmd(bool full)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta::sta()->updateTiming(full);
|
||||
}
|
||||
|
||||
|
|
@ -226,46 +169,37 @@ endpoint_path_count()
|
|||
void
|
||||
find_requireds()
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta::sta()->findRequireds();
|
||||
}
|
||||
|
||||
Slack
|
||||
total_negative_slack_cmd(const MinMax *min_max)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta *sta = Sta::sta();
|
||||
return sta->totalNegativeSlack(min_max);
|
||||
return Sta::sta()->totalNegativeSlack(min_max);
|
||||
}
|
||||
|
||||
Slack
|
||||
total_negative_slack_corner_cmd(const Corner *corner,
|
||||
const MinMax *min_max)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta *sta = Sta::sta();
|
||||
return sta->totalNegativeSlack(corner, min_max);
|
||||
return Sta::sta()->totalNegativeSlack(corner, min_max);
|
||||
}
|
||||
|
||||
Slack
|
||||
worst_slack_cmd(const MinMax *min_max)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta *sta = Sta::sta();
|
||||
Slack worst_slack;
|
||||
Vertex *worst_vertex;
|
||||
sta->worstSlack(min_max, worst_slack, worst_vertex);
|
||||
Sta::sta()->worstSlack(min_max, worst_slack, worst_vertex);
|
||||
return worst_slack;
|
||||
}
|
||||
|
||||
Vertex *
|
||||
worst_slack_vertex(const MinMax *min_max)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta *sta = Sta::sta();
|
||||
Slack worst_slack;
|
||||
Vertex *worst_vertex;
|
||||
sta->worstSlack(min_max, worst_slack, worst_vertex);
|
||||
Sta::sta()->worstSlack(min_max, worst_slack, worst_vertex);
|
||||
return worst_vertex;;
|
||||
}
|
||||
|
||||
|
|
@ -273,11 +207,9 @@ Slack
|
|||
worst_slack_corner(const Corner *corner,
|
||||
const MinMax *min_max)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta *sta = Sta::sta();
|
||||
Slack worst_slack;
|
||||
Vertex *worst_vertex;
|
||||
sta->worstSlack(corner, min_max, worst_slack, worst_vertex);
|
||||
Sta::sta()->worstSlack(corner, min_max, worst_slack, worst_vertex);
|
||||
return worst_slack;
|
||||
}
|
||||
|
||||
|
|
@ -286,6 +218,7 @@ vertex_worst_arrival_path(Vertex *vertex,
|
|||
const MinMax *min_max)
|
||||
{
|
||||
Sta *sta = Sta::sta();
|
||||
sta->ensureLinked();
|
||||
PathRef path = sta->vertexWorstArrivalPath(vertex, min_max);
|
||||
if (!path.isNull())
|
||||
return new PathRef(path);
|
||||
|
|
@ -299,6 +232,7 @@ vertex_worst_arrival_path_rf(Vertex *vertex,
|
|||
MinMax *min_max)
|
||||
{
|
||||
Sta *sta = Sta::sta();
|
||||
sta->ensureLinked();
|
||||
PathRef path = sta->vertexWorstArrivalPath(vertex, rf, min_max);
|
||||
if (!path.isNull())
|
||||
return new PathRef(path);
|
||||
|
|
@ -311,6 +245,7 @@ vertex_worst_slack_path(Vertex *vertex,
|
|||
const MinMax *min_max)
|
||||
{
|
||||
Sta *sta = Sta::sta();
|
||||
sta->ensureLinked();
|
||||
PathRef path = sta->vertexWorstSlackPath(vertex, min_max);
|
||||
if (!path.isNull())
|
||||
return new PathRef(path);
|
||||
|
|
@ -400,8 +335,8 @@ void
|
|||
report_loops()
|
||||
{
|
||||
Sta *sta = Sta::sta();
|
||||
Network *network = cmdLinkedNetwork();
|
||||
Graph *graph = cmdGraph();
|
||||
Network *network = sta->ensureLinked();
|
||||
Graph *graph = sta->ensureGraph();
|
||||
Report *report = sta->report();
|
||||
for (GraphLoop *loop : *sta->graphLoops()) {
|
||||
loop->report(report, network, graph);
|
||||
|
|
@ -444,7 +379,6 @@ find_path_ends(ExceptionFrom *from,
|
|||
bool clk_gating_setup,
|
||||
bool clk_gating_hold)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta *sta = Sta::sta();
|
||||
PathEndSeq ends = sta->findPathEnds(from, thrus, to, unconstrained,
|
||||
corner, delay_min_max,
|
||||
|
|
@ -582,7 +516,6 @@ report_clk_skew(ConstClockSeq clks,
|
|||
bool include_internal_latency,
|
||||
int digits)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta::sta()->reportClkSkew(clks, corner, setup_hold,
|
||||
include_internal_latency, digits);
|
||||
}
|
||||
|
|
@ -593,7 +526,6 @@ report_clk_latency(ConstClockSeq clks,
|
|||
bool include_internal_latency,
|
||||
int digits)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta::sta()->reportClkLatency(clks, corner, include_internal_latency, digits);
|
||||
}
|
||||
|
||||
|
|
@ -601,7 +533,6 @@ float
|
|||
worst_clk_skew_cmd(const SetupHold *setup_hold,
|
||||
bool include_internal_latency)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
return Sta::sta()->findWorstClkSkew(setup_hold, include_internal_latency);
|
||||
}
|
||||
|
||||
|
|
@ -610,7 +541,6 @@ worst_clk_skew_cmd(const SetupHold *setup_hold,
|
|||
MinPulseWidthCheckSeq &
|
||||
min_pulse_width_violations(const Corner *corner)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
return Sta::sta()->minPulseWidthViolations(corner);
|
||||
}
|
||||
|
||||
|
|
@ -618,7 +548,6 @@ MinPulseWidthCheckSeq &
|
|||
min_pulse_width_check_pins(PinSeq *pins,
|
||||
const Corner *corner)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta *sta = Sta::sta();
|
||||
MinPulseWidthCheckSeq &checks = sta->minPulseWidthChecks(pins, corner);
|
||||
delete pins;
|
||||
|
|
@ -628,14 +557,12 @@ min_pulse_width_check_pins(PinSeq *pins,
|
|||
MinPulseWidthCheckSeq &
|
||||
min_pulse_width_checks(const Corner *corner)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
return Sta::sta()->minPulseWidthChecks(corner);
|
||||
}
|
||||
|
||||
MinPulseWidthCheck *
|
||||
min_pulse_width_check_slack(const Corner *corner)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
return Sta::sta()->minPulseWidthSlack(corner);
|
||||
}
|
||||
|
||||
|
|
@ -658,14 +585,12 @@ report_mpw_check(MinPulseWidthCheck *check,
|
|||
MinPeriodCheckSeq &
|
||||
min_period_violations()
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
return Sta::sta()->minPeriodViolations();
|
||||
}
|
||||
|
||||
MinPeriodCheck *
|
||||
min_period_check_slack()
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
return Sta::sta()->minPeriodSlack();
|
||||
}
|
||||
|
||||
|
|
@ -688,14 +613,12 @@ report_min_period_check(MinPeriodCheck *check,
|
|||
MaxSkewCheckSeq &
|
||||
max_skew_violations()
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
return Sta::sta()->maxSkewViolations();
|
||||
}
|
||||
|
||||
MaxSkewCheck *
|
||||
max_skew_check_slack()
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
return Sta::sta()->maxSkewSlack();
|
||||
}
|
||||
|
||||
|
|
@ -719,9 +642,7 @@ Slack
|
|||
find_clk_min_period(const Clock *clk,
|
||||
bool ignore_port_paths)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta *sta = Sta::sta();
|
||||
return sta->findClkMinPeriod(clk, ignore_port_paths);
|
||||
return Sta::sta()->findClkMinPeriod(clk, ignore_port_paths);
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////////////////
|
||||
|
|
@ -732,21 +653,18 @@ check_slew_limits(Net *net,
|
|||
const Corner *corner,
|
||||
const MinMax *min_max)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
return Sta::sta()->checkSlewLimits(net, violators, corner, min_max);
|
||||
}
|
||||
|
||||
size_t
|
||||
max_slew_violation_count()
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
return Sta::sta()->checkSlewLimits(nullptr, true, nullptr, MinMax::max()).size();
|
||||
}
|
||||
|
||||
float
|
||||
max_slew_check_slack()
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta *sta = Sta::sta();
|
||||
const Pin *pin;
|
||||
Slew slew;
|
||||
|
|
@ -759,7 +677,6 @@ max_slew_check_slack()
|
|||
float
|
||||
max_slew_check_limit()
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta *sta = Sta::sta();
|
||||
const Pin *pin;
|
||||
Slew slew;
|
||||
|
|
@ -798,21 +715,18 @@ check_fanout_limits(Net *net,
|
|||
bool violators,
|
||||
const MinMax *min_max)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
return Sta::sta()->checkFanoutLimits(net, violators, min_max);
|
||||
}
|
||||
|
||||
size_t
|
||||
max_fanout_violation_count()
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
return Sta::sta()->checkFanoutLimits(nullptr, true, MinMax::max()).size();
|
||||
}
|
||||
|
||||
float
|
||||
max_fanout_check_slack()
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta *sta = Sta::sta();
|
||||
const Pin *pin;
|
||||
float fanout;
|
||||
|
|
@ -825,7 +739,6 @@ max_fanout_check_slack()
|
|||
float
|
||||
max_fanout_check_limit()
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta *sta = Sta::sta();
|
||||
const Pin *pin;
|
||||
float fanout;
|
||||
|
|
@ -863,21 +776,18 @@ check_capacitance_limits(Net *net,
|
|||
const Corner *corner,
|
||||
const MinMax *min_max)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
return Sta::sta()->checkCapacitanceLimits(net, violators, corner, min_max);
|
||||
}
|
||||
|
||||
size_t
|
||||
max_capacitance_violation_count()
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
return Sta::sta()->checkCapacitanceLimits(nullptr, true,nullptr,MinMax::max()).size();
|
||||
}
|
||||
|
||||
float
|
||||
max_capacitance_check_slack()
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta *sta = Sta::sta();
|
||||
const Pin *pin;
|
||||
float capacitance;
|
||||
|
|
@ -890,7 +800,6 @@ max_capacitance_check_slack()
|
|||
float
|
||||
max_capacitance_check_limit()
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta *sta = Sta::sta();
|
||||
const Pin *pin;
|
||||
float capacitance;
|
||||
|
|
@ -984,7 +893,6 @@ check_timing_cmd(bool no_input_delay,
|
|||
bool loops,
|
||||
bool generated_clks)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
return Sta::sta()->checkTiming(no_input_delay, no_output_delay,
|
||||
reg_multiple_clks, reg_no_clks,
|
||||
unconstrained_endpoints,
|
||||
|
|
@ -1002,7 +910,6 @@ find_fanin_pins(PinSeq *to,
|
|||
bool thru_disabled,
|
||||
bool thru_constants)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta *sta = Sta::sta();
|
||||
PinSet fanin = sta->findFaninPins(to, flat, startpoints_only,
|
||||
inst_levels, pin_levels,
|
||||
|
|
@ -1020,7 +927,6 @@ find_fanin_insts(PinSeq *to,
|
|||
bool thru_disabled,
|
||||
bool thru_constants)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta *sta = Sta::sta();
|
||||
InstanceSet fanin = sta->findFaninInstances(to, flat, startpoints_only,
|
||||
inst_levels, pin_levels,
|
||||
|
|
@ -1038,7 +944,6 @@ find_fanout_pins(PinSeq *from,
|
|||
bool thru_disabled,
|
||||
bool thru_constants)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta *sta = Sta::sta();
|
||||
PinSet fanout = sta->findFanoutPins(from, flat, endpoints_only,
|
||||
inst_levels, pin_levels,
|
||||
|
|
@ -1056,7 +961,6 @@ find_fanout_insts(PinSeq *from,
|
|||
bool thru_disabled,
|
||||
bool thru_constants)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
Sta *sta = Sta::sta();
|
||||
InstanceSet fanout = sta->findFanoutInstances(from, flat, endpoints_only,
|
||||
inst_levels, pin_levels,
|
||||
|
|
@ -1254,7 +1158,6 @@ PropertyValue
|
|||
pin_property(const Pin *pin,
|
||||
const char *property)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
return getProperty(pin, property, Sta::sta());
|
||||
}
|
||||
|
||||
|
|
@ -1262,7 +1165,6 @@ PropertyValue
|
|||
instance_property(const Instance *inst,
|
||||
const char *property)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
return getProperty(inst, property, Sta::sta());
|
||||
}
|
||||
|
||||
|
|
@ -1270,7 +1172,6 @@ PropertyValue
|
|||
net_property(const Net *net,
|
||||
const char *property)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
return getProperty(net, property, Sta::sta());
|
||||
}
|
||||
|
||||
|
|
@ -1321,7 +1222,6 @@ PropertyValue
|
|||
edge_property(Edge *edge,
|
||||
const char *property)
|
||||
{
|
||||
cmdGraph();
|
||||
return getProperty(edge, property, Sta::sta());
|
||||
}
|
||||
|
||||
|
|
@ -1329,7 +1229,6 @@ PropertyValue
|
|||
clock_property(Clock *clk,
|
||||
const char *property)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
return getProperty(clk, property, Sta::sta());
|
||||
}
|
||||
|
||||
|
|
@ -1337,7 +1236,6 @@ PropertyValue
|
|||
path_end_property(PathEnd *end,
|
||||
const char *property)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
return getProperty(end, property, Sta::sta());
|
||||
}
|
||||
|
||||
|
|
@ -1345,7 +1243,6 @@ PropertyValue
|
|||
path_ref_property(PathRef *path,
|
||||
const char *property)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
return getProperty(path, property, Sta::sta());
|
||||
}
|
||||
|
||||
|
|
@ -1353,7 +1250,6 @@ PropertyValue
|
|||
timing_arc_set_property(TimingArcSet *arc_set,
|
||||
const char *property)
|
||||
{
|
||||
cmdLinkedNetwork();
|
||||
return getProperty(arc_set, property, Sta::sta());
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -73,6 +73,7 @@
|
|||
#include "VisitPathEnds.hh"
|
||||
#include "PathExpanded.hh"
|
||||
#include "MakeTimingModel.hh"
|
||||
#include "spice/WritePathSpice.hh"
|
||||
|
||||
namespace sta {
|
||||
|
||||
|
|
@ -2108,6 +2109,7 @@ Sta::writeSdc(const char *filename,
|
|||
bool gzip,
|
||||
bool no_timestamp)
|
||||
{
|
||||
ensureLinked();
|
||||
sta::writeSdc(network_->topInstance(), filename, "write_sdc",
|
||||
leaf, native, digits, gzip, no_timestamp, sdc_);
|
||||
}
|
||||
|
|
@ -3308,6 +3310,7 @@ Sta::findDelays(Level level)
|
|||
void
|
||||
Sta::delayCalcPreamble()
|
||||
{
|
||||
ensureLinked();
|
||||
ensureClkNetwork();
|
||||
}
|
||||
|
||||
|
|
@ -3401,9 +3404,25 @@ Sta::vertexSlew(Vertex *vertex,
|
|||
|
||||
////////////////////////////////////////////////////////////////
|
||||
|
||||
// Make sure the network has been read and linked.
|
||||
// Throwing an error means the caller doesn't have to check the result.
|
||||
Network *
|
||||
Sta::ensureLinked()
|
||||
{
|
||||
if (network_ == nullptr || !network_->isLinked())
|
||||
report_->error(1570, "No network has been linked.");
|
||||
// OpenROAD db is inherently linked but may not have associated
|
||||
// liberty files so check for them here.
|
||||
if (network_->defaultLibertyLibrary() == nullptr)
|
||||
report_->error(2141, "No liberty libraries found.");
|
||||
// Return cmd/sdc network.
|
||||
return cmd_network_;
|
||||
}
|
||||
|
||||
Graph *
|
||||
Sta::ensureGraph()
|
||||
{
|
||||
ensureLinked();
|
||||
if (graph_ == nullptr && network_) {
|
||||
makeGraph();
|
||||
// Update pointers to graph.
|
||||
|
|
@ -3556,6 +3575,7 @@ Sta::setArcDelay(Edge *edge,
|
|||
const MinMaxAll *min_max,
|
||||
ArcDelay delay)
|
||||
{
|
||||
ensureGraph();
|
||||
for (MinMax *mm : min_max->range()) {
|
||||
const DcalcAnalysisPt *dcalc_ap = corner->findDcalcAnalysisPt(mm);
|
||||
DcalcAPIndex ap_index = dcalc_ap->index();
|
||||
|
|
@ -3578,6 +3598,7 @@ Sta::setAnnotatedSlew(Vertex *vertex,
|
|||
const RiseFallBoth *rf,
|
||||
float slew)
|
||||
{
|
||||
ensureGraph();
|
||||
for (MinMax *mm : min_max->range()) {
|
||||
const DcalcAnalysisPt *dcalc_ap = corner->findDcalcAnalysisPt(mm);
|
||||
DcalcAPIndex ap_index = dcalc_ap->index();
|
||||
|
|
@ -3608,8 +3629,10 @@ Sta::writeSdf(const char *filename,
|
|||
void
|
||||
Sta::removeDelaySlewAnnotations()
|
||||
{
|
||||
graph_->removeDelaySlewAnnotations();
|
||||
delaysInvalid();
|
||||
if (graph_) {
|
||||
graph_->removeDelaySlewAnnotations();
|
||||
delaysInvalid();
|
||||
}
|
||||
}
|
||||
|
||||
LogicValue
|
||||
|
|
@ -3863,6 +3886,7 @@ Sta::readSpef(const char *filename,
|
|||
float coupling_cap_factor,
|
||||
bool reduce)
|
||||
{
|
||||
ensureLinked();
|
||||
setParasiticAnalysisPts(corner != nullptr);
|
||||
const MinMax *ap_min_max = (min_max == MinMaxAll::all())
|
||||
? MinMax::max()
|
||||
|
|
@ -3897,6 +3921,7 @@ void
|
|||
Sta::reportParasiticAnnotation(bool report_unannotated,
|
||||
const Corner *corner)
|
||||
{
|
||||
ensureLinked();
|
||||
ensureGraph();
|
||||
sta::reportParasiticAnnotation(report_unannotated, corner, this);
|
||||
}
|
||||
|
|
@ -4109,19 +4134,18 @@ Sta::disconnectPin(Pin *pin)
|
|||
|
||||
void
|
||||
Sta::makePortPin(const char *port_name,
|
||||
const char *direction)
|
||||
PortDirection *dir)
|
||||
{
|
||||
ensureLinked();
|
||||
NetworkReader *network = dynamic_cast<NetworkReader*>(network_);
|
||||
Instance *top_inst = network->topInstance();
|
||||
Cell *top_cell = network->cell(top_inst);
|
||||
Port *port = network->makePort(top_cell, port_name);
|
||||
PortDirection *dir = PortDirection::find(direction);
|
||||
if (dir)
|
||||
network->setDirection(port, dir);
|
||||
network->setDirection(port, dir);
|
||||
Pin *pin = network->makePin(top_inst, port, nullptr);
|
||||
makePortPinAfter(pin);
|
||||
}
|
||||
|
||||
|
||||
////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// Network edit before/after methods.
|
||||
|
|
@ -4744,6 +4768,7 @@ Sta::findRegisterOutputPins(ClockSet *clks,
|
|||
void
|
||||
Sta::findRegisterPreamble()
|
||||
{
|
||||
ensureLinked();
|
||||
ensureGraph();
|
||||
ensureGraphSdcAnnotated();
|
||||
sim_->ensureConstantsPropagated();
|
||||
|
|
@ -5600,9 +5625,7 @@ Sta::writeTimingModel(const char *lib_name,
|
|||
const char *filename,
|
||||
const Corner *corner)
|
||||
{
|
||||
if (network()->defaultLibertyLibrary() == nullptr) {
|
||||
report_->error(2141, "No liberty libraries found.");
|
||||
}
|
||||
ensureLinked();
|
||||
LibertyLibrary *library = makeTimingModel(lib_name, cell_name, filename,
|
||||
corner, this);
|
||||
writeLiberty(library, filename, this);
|
||||
|
|
@ -5613,6 +5636,7 @@ Sta::writeTimingModel(const char *lib_name,
|
|||
void
|
||||
Sta::powerPreamble()
|
||||
{
|
||||
ensureLinked();
|
||||
// Use arrivals to find clocking info.
|
||||
searchPreamble();
|
||||
search_->findAllArrivals();
|
||||
|
|
@ -5650,6 +5674,24 @@ Sta::findClkedActivity(const Pin *pin)
|
|||
|
||||
////////////////////////////////////////////////////////////////
|
||||
|
||||
void
|
||||
Sta::writePathSpice(PathRef *path,
|
||||
const char *spice_filename,
|
||||
const char *subckt_filename,
|
||||
const char *lib_subckt_filename,
|
||||
const char *model_filename,
|
||||
const char *power_name,
|
||||
const char *gnd_name,
|
||||
CircuitSim ckt_sim)
|
||||
{
|
||||
ensureLinked();
|
||||
sta::writePathSpice(path, spice_filename, subckt_filename,
|
||||
lib_subckt_filename, model_filename,
|
||||
power_name, gnd_name, ckt_sim, this);
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////////////////
|
||||
|
||||
void
|
||||
Sta::ensureClkNetwork()
|
||||
{
|
||||
|
|
|
|||
|
|
@ -161,8 +161,6 @@ writePathSpice(Path *path,
|
|||
CircuitSim ckt_sim,
|
||||
StaState *sta)
|
||||
{
|
||||
if (sta->network()->defaultLibertyLibrary() == nullptr)
|
||||
sta->report()->error(1600, "No liberty libraries found,");
|
||||
WritePathSpice writer(path, spice_filename, subckt_filename,
|
||||
lib_subckt_filename, model_filename,
|
||||
power_name, gnd_name, ckt_sim, sta);
|
||||
|
|
|
|||
|
|
@ -35,9 +35,9 @@ write_path_spice_cmd(PathRef *path,
|
|||
CircuitSim ckt_sim)
|
||||
{
|
||||
Sta *sta = Sta::sta();
|
||||
writePathSpice(path, spice_filename, subckt_filename,
|
||||
lib_subckt_filename, model_filename,
|
||||
power_name, gnd_name, ckt_sim, sta);
|
||||
sta->writePathSpice(path, spice_filename, subckt_filename,
|
||||
lib_subckt_filename, model_filename,
|
||||
power_name, gnd_name, ckt_sim);
|
||||
}
|
||||
|
||||
%} // inline
|
||||
|
|
|
|||
|
|
@ -48,13 +48,6 @@ namespace sta {
|
|||
typedef MinPulseWidthCheckSeq::Iterator MinPulseWidthCheckSeqIterator;
|
||||
typedef MinMaxAll MinMaxAllNull;
|
||||
|
||||
Network *
|
||||
cmdNetwork();
|
||||
Network *
|
||||
cmdLinkedNetwork();
|
||||
Graph *
|
||||
cmdGraph();
|
||||
|
||||
template <class TYPE>
|
||||
Vector<TYPE> *
|
||||
tclListSeqPtr(Tcl_Obj *const source,
|
||||
|
|
@ -667,6 +660,19 @@ using namespace sta;
|
|||
Tcl_SetResult(interp, const_cast<char*>(str), TCL_STATIC);
|
||||
}
|
||||
|
||||
%typemap(in) PortDirection* {
|
||||
int length;
|
||||
const char *arg = Tcl_GetStringFromObj($input, &length);
|
||||
PortDirection *dir = PortDirection::find(arg);
|
||||
if (dir == nullptr) {
|
||||
Tcl_SetResult(interp,const_cast<char*>("Error: port direction not found."),
|
||||
TCL_STATIC);
|
||||
return TCL_ERROR;
|
||||
}
|
||||
else
|
||||
$1 = dir;
|
||||
}
|
||||
|
||||
%typemap(in) TimingRole* {
|
||||
int length;
|
||||
const char *arg = Tcl_GetStringFromObj($input, &length);
|
||||
|
|
@ -847,12 +853,12 @@ using namespace sta;
|
|||
}
|
||||
|
||||
%typemap(in) PinSet {
|
||||
Network *network = cmdNetwork();
|
||||
Network *network = Sta::sta()->ensureLinked();
|
||||
$1 = tclListNetworkSet1<PinSet, Pin>($input, SWIGTYPE_p_Pin, interp, network);
|
||||
}
|
||||
|
||||
%typemap(in) PinSet* {
|
||||
Network *network = cmdNetwork();
|
||||
Network *network = Sta::sta()->ensureLinked();
|
||||
$1 = tclListNetworkSet<PinSet, Pin>($input, SWIGTYPE_p_Pin, interp, network);
|
||||
}
|
||||
|
||||
|
|
@ -888,7 +894,7 @@ using namespace sta;
|
|||
}
|
||||
|
||||
%typemap(in) InstanceSet* {
|
||||
Network *network = cmdNetwork();
|
||||
Network *network = Sta::sta()->ensureLinked();
|
||||
$1 = tclListNetworkSet<InstanceSet, Instance>($input, SWIGTYPE_p_Instance,
|
||||
interp, network);
|
||||
}
|
||||
|
|
@ -898,7 +904,7 @@ using namespace sta;
|
|||
}
|
||||
|
||||
%typemap(in) NetSet* {
|
||||
Network *network = cmdNetwork();
|
||||
Network *network = Sta::sta()->ensureLinked();
|
||||
$1 = tclListNetworkSet<NetSet, Net>($input, SWIGTYPE_p_Net, interp, network);
|
||||
}
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue