commit
7c31912ac9
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@ -579,13 +579,17 @@ GraphDelayCalc::findVertexDelay(Vertex *vertex,
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else {
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if (network_->isLeaf(pin)) {
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if (vertex->isDriver(network_)) {
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bool delay_changed = findDriverDelays(vertex, arc_delay_calc);
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LoadPinIndexMap load_pin_index_map = makeLoadPinIndexMap(vertex);
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DrvrLoadSlews prev_load_slews = loadSlews(load_pin_index_map);
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findDriverDelays(vertex, arc_delay_calc, load_pin_index_map);
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if (propagate) {
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if (network_->direction(pin)->isInternal())
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enqueueTimingChecksEdges(vertex);
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// Enqueue adjacent vertices even if the delays did not
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bool load_slews_changed = loadSlewsChanged(prev_load_slews,
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load_pin_index_map);
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// Enqueue adjacent vertices even if the load slews did not
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// change when non-incremental to stride past annotations.
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if (delay_changed || !incremental_)
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if (load_slews_changed || !incremental_)
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iter_->enqueueAdjacentVertices(vertex);
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}
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}
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@ -605,6 +609,37 @@ GraphDelayCalc::findVertexDelay(Vertex *vertex,
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}
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}
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DrvrLoadSlews
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GraphDelayCalc::loadSlews(LoadPinIndexMap &load_pin_index_map)
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{
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DrvrLoadSlews load_slews(load_pin_index_map.size());
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for (auto const [pin, index] : load_pin_index_map) {
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Vertex *load_vertex = graph_->pinLoadVertex(pin);
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load_slews[index] = graph_->slews(load_vertex);
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}
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return load_slews;
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}
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bool
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GraphDelayCalc::loadSlewsChanged(DrvrLoadSlews &prev_load_slews,
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LoadPinIndexMap &load_pin_index_map)
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{
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for (auto const [pin, index] : load_pin_index_map) {
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Vertex *load_vertex = graph_->pinLoadVertex(pin);
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const SlewSeq load_slews = graph_->slews(load_vertex);
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const SlewSeq &prev_slews = prev_load_slews[index];
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for (size_t i = 0; i < load_slews.size(); i++) {
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const Slew &slew = delayAsFloat(load_slews[i]);
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const Slew &prev_slew = delayAsFloat(prev_slews[i]);
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if ((prev_slew == 0.0 && slew != 0.0)
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|| (prev_slew != 0.0
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&& abs((slew - prev_slew) / prev_slew) > incremental_delay_tolerance_))
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return true;
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}
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}
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return false;
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}
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void
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GraphDelayCalc::enqueueTimingChecksEdges(Vertex *vertex)
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{
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@ -639,21 +674,20 @@ GraphDelayCalc::enqueueTimingChecksEdges(Vertex *vertex)
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}
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}
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bool
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void
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GraphDelayCalc::findDriverDelays(Vertex *drvr_vertex,
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ArcDelayCalc *arc_delay_calc)
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ArcDelayCalc *arc_delay_calc,
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LoadPinIndexMap &load_pin_index_map)
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{
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bool delay_changed = false;
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MultiDrvrNet *multi_drvr = findMultiDrvrNet(drvr_vertex);
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if (multi_drvr == nullptr
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|| (multi_drvr
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&& (!multi_drvr->parallelGates(network_)
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|| drvr_vertex == multi_drvr->dcalcDrvr()))) {
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initLoadSlews(drvr_vertex);
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delay_changed |= findDriverDelays1(drvr_vertex, multi_drvr, arc_delay_calc);
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findDriverDelays1(drvr_vertex, multi_drvr, arc_delay_calc, load_pin_index_map);
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}
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arc_delay_calc_->finishDrvrPin();
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return delay_changed;
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}
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MultiDrvrNet *
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@ -782,7 +816,8 @@ GraphDelayCalc::initLoadSlews(Vertex *drvr_vertex)
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bool
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GraphDelayCalc::findDriverDelays1(Vertex *drvr_vertex,
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MultiDrvrNet *multi_drvr,
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ArcDelayCalc *arc_delay_calc)
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ArcDelayCalc *arc_delay_calc,
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LoadPinIndexMap &load_pin_index_map)
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{
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initSlew(drvr_vertex);
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if (multi_drvr
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@ -806,7 +841,8 @@ GraphDelayCalc::findDriverDelays1(Vertex *drvr_vertex,
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&& search_pred_->searchThru(edge)
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&& !edge->role()->isLatchDtoQ())
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delay_changed |= findDriverEdgeDelays(drvr_vertex, multi_drvr, edge,
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arc_delay_calc, delay_exists);
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arc_delay_calc, load_pin_index_map,
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delay_exists);
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}
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for (auto rf : RiseFall::range()) {
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if (!delay_exists[rf->index()])
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@ -841,8 +877,10 @@ GraphDelayCalc::findLatchEdgeDelays(Edge *edge)
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debugPrint(debug_, "delay_calc", 2, "find latch D->Q %s",
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sdc_network_->pathName(drvr_inst));
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array<bool, RiseFall::index_count> delay_exists = {false, false};
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LoadPinIndexMap load_pin_index_map = makeLoadPinIndexMap(drvr_vertex);
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bool delay_changed = findDriverEdgeDelays(drvr_vertex, nullptr, edge,
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arc_delay_calc_, delay_exists);
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arc_delay_calc_, load_pin_index_map,
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delay_exists);
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if (delay_changed && observer_)
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observer_->delayChangedTo(drvr_vertex);
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}
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@ -852,17 +890,18 @@ GraphDelayCalc::findDriverEdgeDelays(Vertex *drvr_vertex,
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const MultiDrvrNet *multi_drvr,
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Edge *edge,
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ArcDelayCalc *arc_delay_calc,
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LoadPinIndexMap &load_pin_index_map,
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// Return value.
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array<bool, RiseFall::index_count> &delay_exists)
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{
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Vertex *from_vertex = edge->from(graph_);
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const TimingArcSet *arc_set = edge->timingArcSet();
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bool delay_changed = false;
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LoadPinIndexMap load_pin_index_map = makeLoadPinIndexMap(drvr_vertex);
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for (auto dcalc_ap : corners_->dcalcAnalysisPts()) {
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for (const TimingArc *arc : arc_set->arcs()) {
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delay_changed |= findDriverArcDelays(drvr_vertex, multi_drvr, edge, arc,
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load_pin_index_map, dcalc_ap,
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arc_delay_calc);
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dcalc_ap, arc_delay_calc,
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load_pin_index_map);
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delay_exists[arc->toEdge()->asRiseFall()->index()] = true;
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}
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}
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@ -873,6 +912,7 @@ GraphDelayCalc::findDriverEdgeDelays(Vertex *drvr_vertex,
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return delay_changed;
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}
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// External API.
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void
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GraphDelayCalc::findDriverArcDelays(Vertex *drvr_vertex,
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Edge *edge,
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@ -882,9 +922,8 @@ GraphDelayCalc::findDriverArcDelays(Vertex *drvr_vertex,
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{
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MultiDrvrNet *multi_drvr = multiDrvrNet(drvr_vertex);
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LoadPinIndexMap load_pin_index_map = makeLoadPinIndexMap(drvr_vertex);
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findDriverArcDelays(drvr_vertex, multi_drvr, edge, arc,
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load_pin_index_map, dcalc_ap,
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arc_delay_calc);
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findDriverArcDelays(drvr_vertex, multi_drvr, edge, arc, dcalc_ap,
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arc_delay_calc, load_pin_index_map);
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}
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bool
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@ -892,9 +931,9 @@ GraphDelayCalc::findDriverArcDelays(Vertex *drvr_vertex,
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const MultiDrvrNet *multi_drvr,
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Edge *edge,
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const TimingArc *arc,
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LoadPinIndexMap &load_pin_index_map,
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const DcalcAnalysisPt *dcalc_ap,
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ArcDelayCalc *arc_delay_calc)
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ArcDelayCalc *arc_delay_calc,
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LoadPinIndexMap &load_pin_index_map)
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{
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bool delay_changed = false;
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const RiseFall *from_rf = arc->fromEdge()->asRiseFall();
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@ -741,6 +741,20 @@ Graph::setSlew(Vertex *vertex,
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}
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}
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SlewSeq
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Graph::slews(Vertex *vertex)
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{
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SlewSeq slews;
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VertexId vertex_id = id(vertex);
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DcalcAPIndex rf_ap_count = slew_rf_count_ * ap_count_;
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for (DcalcAPIndex i = 0; i < rf_ap_count; i++) {
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DelayTable *table = slew_tables_[i];
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Slew &slew = table->ref(vertex_id);
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slews.push_back(slew);
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}
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return slews;
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}
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////////////////////////////////////////////////////////////////
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Edge *
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@ -130,6 +130,7 @@ public:
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const RiseFall *rf,
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DcalcAPIndex ap_index,
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const Slew &slew);
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SlewSeq slews(Vertex *vertex);
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// Edge functions.
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virtual Edge *edge(EdgeId edge_index) const;
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@ -23,9 +23,12 @@
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#include "Vector.hh"
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#include "MinMax.hh"
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#include "Transition.hh"
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#include "Delay.hh"
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namespace sta {
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using std::vector;
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// Class declarations for pointer references.
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class Graph;
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class Vertex;
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@ -46,6 +49,7 @@ typedef int Level;
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typedef int DcalcAPIndex;
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typedef int TagGroupIndex;
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typedef Vector<GraphLoop*> GraphLoopSeq;
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typedef vector<Slew> SlewSeq;
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static constexpr int level_max = std::numeric_limits<Level>::max();
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@ -26,7 +26,6 @@
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#include "SearchClass.hh"
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#include "DcalcAnalysisPt.hh"
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#include "StaState.hh"
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#include "Delay.hh"
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#include "ArcDelayCalc.hh"
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namespace sta {
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@ -41,6 +40,7 @@ class FindVertexDelays;
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class NetCaps;
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typedef Map<const Vertex*, MultiDrvrNet*> MultiDrvrNetMap;
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typedef vector<SlewSeq> DrvrLoadSlews;
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// This class traverses the graph calling the arc delay calculator and
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// annotating delays on graph edges.
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@ -163,8 +163,9 @@ protected:
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const TimingArc *arc,
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float from_slew,
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const DcalcAnalysisPt *dcalc_ap);
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bool findDriverDelays(Vertex *drvr_vertex,
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ArcDelayCalc *arc_delay_calc);
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void findDriverDelays(Vertex *drvr_vertex,
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ArcDelayCalc *arc_delay_calc,
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LoadPinIndexMap &load_pin_index_map);
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MultiDrvrNet *multiDrvrNet(const Vertex *drvr_vertex) const;
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MultiDrvrNet *findMultiDrvrNet(Vertex *drvr_pin);
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MultiDrvrNet *makeMultiDrvrNet(Vertex *drvr_vertex);
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@ -172,20 +173,23 @@ protected:
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Vertex *firstLoad(Vertex *drvr_vertex);
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bool findDriverDelays1(Vertex *drvr_vertex,
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MultiDrvrNet *multi_drvr,
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ArcDelayCalc *arc_delay_calc);
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ArcDelayCalc *arc_delay_calc,
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LoadPinIndexMap &load_pin_index_map);
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void initLoadSlews(Vertex *drvr_vertex);
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bool findDriverEdgeDelays(Vertex *drvr_vertex,
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const MultiDrvrNet *multi_drvr,
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Edge *edge,
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ArcDelayCalc *arc_delay_calc,
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const MultiDrvrNet *multi_drvr,
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Edge *edge,
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ArcDelayCalc *arc_delay_calc,
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LoadPinIndexMap &load_pin_index_map,
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// Return value.
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array<bool, RiseFall::index_count> &delay_exists);
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bool findDriverArcDelays(Vertex *drvr_vertex,
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const MultiDrvrNet *multi_drvr,
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Edge *edge,
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const TimingArc *arc,
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LoadPinIndexMap &load_pin_index_map,
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const DcalcAnalysisPt *dcalc_ap,
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ArcDelayCalc *arc_delay_calc);
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ArcDelayCalc *arc_delay_calc,
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LoadPinIndexMap &load_pin_index_map);
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ArcDcalcArgSeq makeArcDcalcArgs(Vertex *drvr_vertex,
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const MultiDrvrNet *multi_drvr,
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Edge *edge,
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@ -205,6 +209,9 @@ protected:
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void findVertexDelay(Vertex *vertex,
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ArcDelayCalc *arc_delay_calc,
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bool propagate);
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DrvrLoadSlews loadSlews(LoadPinIndexMap &load_pin_index_map);
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bool loadSlewsChanged(DrvrLoadSlews &prev_load_slews,
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LoadPinIndexMap &load_pin_index_map);
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void enqueueTimingChecksEdges(Vertex *vertex);
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bool annotateDelaysSlews(Edge *edge,
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const TimingArc *arc,
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@ -238,25 +238,26 @@ public:
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const RiseFall *to_rf,
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const MinMax *min_max,
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const PathAnalysisPt *path_ap);
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virtual Tag *thruTag(Tag *from_tag,
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Edge *edge,
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const RiseFall *to_rf,
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const MinMax *min_max,
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const PathAnalysisPt *path_ap);
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virtual Tag *thruClkTag(PathVertex *from_path,
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Tag *from_tag,
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bool to_propagates_clk,
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Edge *edge,
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const RiseFall *to_rf,
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const MinMax *min_max,
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const PathAnalysisPt *path_ap);
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Tag *thruTag(Tag *from_tag,
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Edge *edge,
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const RiseFall *to_rf,
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const MinMax *min_max,
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const PathAnalysisPt *path_ap);
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Tag *thruClkTag(PathVertex *from_path,
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Tag *from_tag,
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bool to_propagates_clk,
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Edge *edge,
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const RiseFall *to_rf,
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const MinMax *min_max,
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const PathAnalysisPt *path_ap);
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ClkInfo *thruClkInfo(PathVertex *from_path,
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ClkInfo *from_tag_clk,
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Edge *edge,
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Vertex *to_vertex,
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const Pin *to_pin,
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const MinMax *min_max,
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const PathAnalysisPt *path_ap);
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ClkInfo *from_clk_info,
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bool from_is_clk,
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Edge *edge,
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const Pin *to_pin,
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bool to_is_clk,
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const MinMax *min_max,
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const PathAnalysisPt *path_ap);
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ClkInfo *clkInfoWithCrprClkPath(ClkInfo *from_clk_info,
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PathVertex *from_path,
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const PathAnalysisPt *path_ap);
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@ -54,8 +54,8 @@ public:
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const Arrival &insertion() const { return insertion_; }
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ClockUncertainties *uncertainties() const { return uncertainties_; }
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PathAPIndex pathAPIndex() const { return path_ap_index_; }
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// Clock path for the last driver in the clock network used for
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// crpr resolution.
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// Clock path used for crpr resolution.
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// Null for clocks because the path cannot point to itself.
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PathVertexRep &crprClkPath() { return crpr_clk_path_; }
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const PathVertexRep &crprClkPath() const { return crpr_clk_path_; }
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VertexId crprClkVertexId() const;
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@ -46,20 +46,20 @@ CheckCrpr::CheckCrpr(StaState *sta) :
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{
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}
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PathVertex *
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void
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CheckCrpr::clkPathPrev(const PathVertex *path,
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PathVertex &tmp)
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PathVertex &prev)
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{
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Vertex *vertex = path->vertex(this);
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int arrival_index;
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bool exists;
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path->arrivalIndex(arrival_index, exists);
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tmp = clkPathPrev(vertex, arrival_index);
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if (tmp.isNull())
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return nullptr;
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PathVertexRep *prevs = graph_->prevPaths(vertex);
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if (prevs)
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prev.init(prevs[arrival_index], this);
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else
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return &tmp;
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criticalError(2200, "missing prev paths");
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}
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PathVertex
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@ -70,7 +70,7 @@ CheckCrpr::clkPathPrev(Vertex *vertex,
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if (prevs)
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return PathVertex(prevs[arrival_index], this);
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else {
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criticalError(248, "missing prev paths");
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criticalError(2201, "missing prev paths");
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return PathVertex();
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}
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}
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@ -152,13 +152,22 @@ CheckCrpr::checkCrpr1(const Path *src_path,
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{
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crpr = 0.0;
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crpr_pin = nullptr;
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ClkInfo *src_clk_info = src_path->tag(this)->clkInfo();
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const Tag *src_tag = src_path->tag(this);
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ClkInfo *src_clk_info = src_tag->clkInfo();
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ClkInfo *tgt_clk_info = tgt_clk_path->tag(this)->clkInfo();
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const Clock *src_clk = src_clk_info->clock();
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const Clock *tgt_clk = tgt_clk_info->clock();
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const PathVertex src_clk_path1(src_clk_info->crprClkPath(), this);
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const PathVertex *src_clk_path =
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src_clk_path1.isNull() ? nullptr : &src_clk_path1;
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PathVertex src_clk_path1;
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PathVertexRep &src_crpr_clk_path = src_clk_info->crprClkPath();
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const PathVertex *src_clk_path = nullptr;
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if (src_tag->isClock()) {
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src_clk_path1.init(src_path->vertex(this), src_path->tag(this), this);
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src_clk_path = &src_clk_path1;
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}
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else if (!src_crpr_clk_path.isNull()) {
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src_clk_path1.init(src_crpr_clk_path, this);
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src_clk_path = &src_clk_path1;
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}
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const MinMax *src_clk_min_max =
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src_clk_path ? src_clk_path->minMax(this) : src_path->minMax(this);
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if (src_clk && tgt_clk
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@ -242,20 +251,30 @@ CheckCrpr::findCrpr(const PathVertex *src_clk_path,
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}
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const PathVertex *src_clk_path2 = src_clk_path1;
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const PathVertex *tgt_clk_path2 = tgt_clk_path1;
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PathVertex tmp1, tmp2;
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PathVertex src_prev, tgt_prev;
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||||
// src_clk_path and tgt_clk_path are now in the same (gen)clk src path.
|
||||
// Use the vertex levels to back up the deeper path to see if they
|
||||
// overlap.
|
||||
while (src_clk_path2 && tgt_clk_path2
|
||||
&& src_clk_path2->pin(this) != tgt_clk_path2->pin(this)) {
|
||||
Level src_level = src_clk_path2->vertex(this)->level();
|
||||
Level tgt_level = tgt_clk_path2->vertex(this)->level();
|
||||
if (src_level >= tgt_level)
|
||||
src_clk_path2 = clkPathPrev(src_clk_path2, tmp1);
|
||||
if (tgt_level >= src_level)
|
||||
tgt_clk_path2 = clkPathPrev(tgt_clk_path2, tmp2);
|
||||
int src_level = src_clk_path2->vertex(this)->level();
|
||||
int tgt_level = tgt_clk_path2->vertex(this)->level();
|
||||
while (src_clk_path2->pin(this) != tgt_clk_path2->pin(this)) {
|
||||
int level_diff = src_level - tgt_level;
|
||||
if (level_diff >= 0) {
|
||||
clkPathPrev(src_clk_path2, src_prev);
|
||||
if (src_prev.isNull())
|
||||
break;
|
||||
src_clk_path2 = &src_prev;
|
||||
src_level = src_clk_path2->vertex(this)->level();
|
||||
}
|
||||
if (level_diff <= 0) {
|
||||
clkPathPrev(tgt_clk_path2, tgt_prev);
|
||||
if (tgt_prev.isNull())
|
||||
break;
|
||||
tgt_clk_path2 = &tgt_prev;
|
||||
tgt_level = tgt_clk_path2->vertex(this)->level();
|
||||
}
|
||||
}
|
||||
if (src_clk_path2 && tgt_clk_path2
|
||||
if (!src_clk_path2->isNull() && !tgt_clk_path2->isNull()
|
||||
&& (src_clk_path2->transition(this) == tgt_clk_path2->transition(this)
|
||||
|| same_pin)) {
|
||||
debugPrint(debug_, "crpr", 2, "crpr pin %s",
|
||||
|
|
|
|||
|
|
@ -56,8 +56,8 @@ public:
|
|||
int arrival_index);
|
||||
|
||||
private:
|
||||
PathVertex *clkPathPrev(const PathVertex *path,
|
||||
PathVertex &tmp);
|
||||
void clkPathPrev(const PathVertex *path,
|
||||
PathVertex &prev);
|
||||
Arrival otherMinMaxArrival(const PathVertex *path);
|
||||
void checkCrpr1(const Path *src_path,
|
||||
const PathVertex *tgt_clk_path,
|
||||
|
|
|
|||
|
|
@ -2417,8 +2417,9 @@ Search::thruClkTag(PathVertex *from_path,
|
|||
&& to_propagates_clk
|
||||
&& (role->isWire()
|
||||
|| role == TimingRole::combinational()));
|
||||
ClkInfo *to_clk_info = thruClkInfo(from_path, from_clk_info,
|
||||
edge, to_vertex, to_pin, min_max, path_ap);
|
||||
ClkInfo *to_clk_info = thruClkInfo(from_path, from_clk_info, from_is_clk,
|
||||
edge, to_pin, to_is_clk,
|
||||
min_max, path_ap);
|
||||
Tag *to_tag = mutateTag(from_tag,from_pin,from_rf,from_is_clk,from_clk_info,
|
||||
to_pin, to_rf, to_is_clk, to_is_reg_clk, false,
|
||||
to_clk_info, nullptr, min_max, path_ap);
|
||||
|
|
@ -2429,9 +2430,10 @@ Search::thruClkTag(PathVertex *from_path,
|
|||
ClkInfo *
|
||||
Search::thruClkInfo(PathVertex *from_path,
|
||||
ClkInfo *from_clk_info,
|
||||
bool from_is_clk,
|
||||
Edge *edge,
|
||||
Vertex *to_vertex,
|
||||
const Pin *to_pin,
|
||||
bool to_is_clk,
|
||||
const MinMax *min_max,
|
||||
const PathAnalysisPt *path_ap)
|
||||
{
|
||||
|
|
@ -2462,7 +2464,7 @@ Search::thruClkInfo(PathVertex *from_path,
|
|||
|
||||
PathVertex *to_crpr_clk_path = nullptr;
|
||||
if (sdc_->crprActive()
|
||||
&& to_vertex->isRegClk()) {
|
||||
&& from_is_clk && !to_is_clk) {
|
||||
to_crpr_clk_path = from_path;
|
||||
changed = true;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -5600,6 +5600,9 @@ Sta::writeTimingModel(const char *lib_name,
|
|||
const char *filename,
|
||||
const Corner *corner)
|
||||
{
|
||||
if (network()->defaultLibertyLibrary() == nullptr) {
|
||||
report_->error(2141, "No liberty libraries found.");
|
||||
}
|
||||
LibertyLibrary *library = makeTimingModel(lib_name, cell_name, filename,
|
||||
corner, this);
|
||||
writeLiberty(library, filename, this);
|
||||
|
|
|
|||
Loading…
Reference in New Issue