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VerilogWriter use liberty bus port order

This commit is contained in:
James Cherry 2019-07-02 16:33:31 -07:00
parent eb9fdd1be0
commit 7af69066df
2 changed files with 13 additions and 17 deletions
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1
network/Network.hh
View File

@ -181,6 +181,7 @@ public:
virtual Port *findMember(const Port *port, virtual Port *findMember(const Port *port,
int index) const = 0; int index) const = 0;
// Iterate over the bits of a bus port or members of a bundle. // Iterate over the bits of a bus port or members of a bundle.
// from_index -> to_index
virtual PortMemberIterator *memberIterator(const Port *port) const = 0; virtual PortMemberIterator *memberIterator(const Port *port) const = 0;
// A port has members if it is a bundle or bus. // A port has members if it is a bundle or bus.
virtual bool hasMembers(const Port *port) const; virtual bool hasMembers(const Port *port) const;

29
verilog/VerilogWriter.cc
View File

@ -243,33 +243,28 @@ VerilogWriter::writeInstBusPin(Instance *inst,
if (!first_port) if (!first_port)
fprintf(stream_, ",\n "); fprintf(stream_, ",\n ");
const char *port_name = network_->name(port); fprintf(stream_, ".%s({", network_->name(port));
fprintf(stream_, ".%s({", port_name);
first_port = false; first_port = false;
bool first_member = true; bool first_member = true;
PortSeq members;
PortMemberIterator *member_iter = network_->memberIterator(port);
while (member_iter->hasNext()) {
Port *member = member_iter->next();
members.push_back(member);
}
delete member_iter;
// Match the bit_from/bit_to order of the liberty cell if it exists. // Match the member order of the liberty cell if it exists.
LibertyPort *lib_port = network_->libertyPort(port); LibertyPort *lib_port = network_->libertyPort(port);
if (lib_port if (lib_port) {
&& (network_->fromIndex(port) > network_->toIndex(port)) Cell *cell = network_->cell(inst);
!= (lib_port->fromIndex() > lib_port->toIndex())) { LibertyPortMemberIterator member_iter(lib_port);
for (int i = members.size() - 1; i >= 0; i--) { while (member_iter.hasNext()) {
Port *member = members[i]; LibertyPort *lib_member = member_iter.next();
Port *member = network_->findPort(cell, lib_member->name());
writeInstBusPinBit(inst, member, first_member); writeInstBusPinBit(inst, member, first_member);
} }
} }
else { else {
for (int i = 0; i < members.size(); i++) { PortMemberIterator *member_iter = network_->memberIterator(port);
Port *member = members[i]; while (member_iter->hasNext()) {
Port *member = member_iter->next();
writeInstBusPinBit(inst, member, first_member); writeInstBusPinBit(inst, member, first_member);
} }
delete member_iter;
} }
fprintf(stream_, "})"); fprintf(stream_, "})");
} }