This commit is contained in:
James Cherry 2020-11-04 10:05:47 -08:00
parent a26af433fc
commit 7023e97bb4
1 changed files with 20 additions and 17 deletions

View File

@ -779,8 +779,8 @@ DmpCap::loadDelaySlew(const Pin *,
ArcDelay &delay, ArcDelay &delay,
Slew &slew) Slew &slew)
{ {
delay = static_cast<float>(elmore); delay = elmore;
slew = static_cast<float>(gate_slew_); slew = gate_slew_;
} }
bool bool
@ -1645,22 +1645,25 @@ DmpCeffDelayCalc::setCeffAlgorithm(const LibertyLibrary *drvr_library,
double rpi, double rpi,
double c1) double c1)
{ {
double rd = gate_model double rd = 0.0;
? gateModelRd(drvr_cell, gate_model, in_slew, c2, c1, if (gate_model) {
related_out_cap, pvt, pocv_enabled_) rd = gateModelRd(drvr_cell, gate_model, in_slew, c2, c1,
: 0.0; related_out_cap, pvt, pocv_enabled_);
// Zero Rd means the table is constant and thus independent of load cap. // Zero Rd means the table is constant and thus independent of load cap.
if (rd < 1e-2 if (rd < 1e-2
// Rpi is small compared to Rd, which makes the load capacitive. // Rpi is small compared to Rd, which makes the load capacitive.
|| rpi < rd * 1e-3 || rpi < rd * 1e-3
// c1/Rpi can be ignored. // c1/Rpi can be ignored.
|| (c1 == 0.0 || c1 < c2 * 1e-3 || rpi == 0.0)) || (c1 == 0.0 || c1 < c2 * 1e-3 || rpi == 0.0))
dmp_alg_ = dmp_cap_; dmp_alg_ = dmp_cap_;
else if (c2 < c1 * 1e-3) else if (c2 < c1 * 1e-3)
dmp_alg_ = dmp_zero_c2_; dmp_alg_ = dmp_zero_c2_;
else
// The full monty.
dmp_alg_ = dmp_pi_;
}
else else
// The full monty. dmp_alg_ = dmp_cap_;
dmp_alg_ = dmp_pi_;
dmp_alg_->init(drvr_library, drvr_cell, pvt, gate_model, dmp_alg_->init(drvr_library, drvr_cell, pvt, gate_model,
drvr_rf_, rd, in_slew, related_out_cap, c2, rpi, c1); drvr_rf_, rd, in_slew, related_out_cap, c2, rpi, c1);
debugPrint6(debug_, "dmp_ceff", 3, debugPrint6(debug_, "dmp_ceff", 3,