Merge remote-tracking branch 'parallax/master'

Signed-off-by: Matt Liberty <mliberty@precisioninno.com>

dcalc/ArcDelayCalc.cc

@@ -49,11 +49,13 @@ ArcDelayCalc::gateDelay(const TimingArc *arc,
 ////////////////////////////////////////////////////////////////
 
 ArcDcalcArg::ArcDcalcArg() :
+  in_pin_(nullptr),
   drvr_pin_(nullptr),
   edge_(nullptr),
   arc_(nullptr),
   in_slew_(0.0),
-  parasitic_(nullptr)
+  parasitic_(nullptr),
+  input_delay_(0.0)
 {
 }
 

dcalc/CcsSimDelayCalc.cc

@@ -226,6 +226,8 @@ CcsSimDelayCalc::gateDelays(ArcDcalcArgSeq &dcalc_args,
   else {
     simulate(dcalc_args);
 
+    ArcDcalcArg &drvr_arg = dcalc_args[0];
+    const LibertyLibrary *drvr_library = drvr_arg.drvrLibrary();
     for (size_t drvr_idx = 0; drvr_idx < dcalc_args.size(); drvr_idx++) {
       ArcDcalcArg &dcalc_arg = dcalc_args[drvr_idx];
       ArcDcalcResult &dcalc_result = dcalc_results[drvr_idx];
@@ -258,8 +260,6 @@ CcsSimDelayCalc::gateDelays(ArcDcalcArgSeq &dcalc_args,
                    delayAsString(wire_delay, this),
                    delayAsString(load_slew, this));
 
-        LibertyLibrary *drvr_library =
-          network_->libertyPort(load_pin)->libertyCell()->libertyLibrary();
         thresholdAdjust(load_pin, drvr_library, drvr_rf_, wire_delay, load_slew);
         dcalc_result.setWireDelay(load_idx, wire_delay);
         dcalc_result.setLoadSlew(load_idx, load_slew);

dcalc/GraphDelayCalc.cc

@@ -610,7 +610,7 @@ GraphDelayCalc::enqueueTimingChecksEdges(Vertex *vertex)
 {
   if (vertex->hasChecks()) {
     VertexInEdgeIterator edge_iter(vertex, graph_);
-    UniqueLock lock(invalid_edge_lock_);
+    LockGuard lock(invalid_edge_lock_);
     while (edge_iter.hasNext()) {
       Edge *edge = edge_iter.next();
       if (edge->role()->isTimingCheck())
@@ -619,7 +619,7 @@ GraphDelayCalc::enqueueTimingChecksEdges(Vertex *vertex)
   }
   if (vertex->isCheckClk()) {
     VertexOutEdgeIterator edge_iter(vertex, graph_);
-    UniqueLock lock(invalid_edge_lock_);
+    LockGuard lock(invalid_edge_lock_);
     while (edge_iter.hasNext()) {
       Edge *edge = edge_iter.next();
       if (edge->role()->isTimingCheck())
@@ -630,7 +630,7 @@ GraphDelayCalc::enqueueTimingChecksEdges(Vertex *vertex)
     // Latch D->Q arcs have to be re-evaled if level(D) > level(E)
     // because levelization does not traverse D->Q arcs to break loops.
     VertexOutEdgeIterator edge_iter(vertex, graph_);
-    UniqueLock lock(invalid_edge_lock_);
+    LockGuard lock(invalid_edge_lock_);
     while (edge_iter.hasNext()) {
       Edge *edge = edge_iter.next();
       if (edge->role() == TimingRole::latchDtoQ())
@@ -661,7 +661,7 @@ GraphDelayCalc::findMultiDrvrNet(Vertex *drvr_vertex)
 {
   // Avoid locking for single driver nets.
   if (hasMultiDrvrs(drvr_vertex)) {
-    UniqueLock lock(multi_drvr_lock_);
+    LockGuard lock(multi_drvr_lock_);
     MultiDrvrNet *multi_drvr = multiDrvrNet(drvr_vertex);
     if (multi_drvr)
       return multi_drvr;

graph/Graph.cc

@@ -576,7 +576,7 @@ Graph::makeArrivals(Vertex *vertex,
   Arrival *arrivals;
   ArrivalId id;
   {
-    UniqueLock lock(arrivals_lock_);
+    LockGuard lock(arrivals_lock_);
     arrivals_.make(count, arrivals, id);
   }
   vertex->setArrivals(id);
@@ -594,7 +594,7 @@ Graph::deleteArrivals(Vertex *vertex,
                       uint32_t count)
 {
   {
-    UniqueLock lock(arrivals_lock_);
+    LockGuard lock(arrivals_lock_);
     arrivals_.destroy(vertex->arrivals(), count);
   }
   vertex->setArrivals(arrival_null);
@@ -609,7 +609,7 @@ Graph::makeRequireds(Vertex *vertex,
   Required *requireds;
   ArrivalId id;
   {
-    UniqueLock lock(requireds_lock_);
+    LockGuard lock(requireds_lock_);
     requireds_.make(count, requireds, id);
   }
   vertex->setRequireds(id);
@@ -627,7 +627,7 @@ Graph::deleteRequireds(Vertex *vertex,
                        uint32_t count)
 {
   {
-    UniqueLock lock(requireds_lock_);
+    LockGuard lock(requireds_lock_);
     requireds_.destroy(vertex->requireds(), count);
   }
   vertex->setRequireds(arrival_null);
@@ -647,7 +647,7 @@ Graph::makePrevPaths(Vertex *vertex,
   PathVertexRep *prev_paths;
   PrevPathId id;
   {
-    UniqueLock lock(prev_paths_lock_);
+    LockGuard lock(prev_paths_lock_);
     prev_paths_.make(count, prev_paths, id);
   }
   vertex->setPrevPaths(id);

include/sta/Mutex.hh

@@ -20,6 +20,7 @@
 
 namespace sta {
 
-typedef std::unique_lock<std::mutex> UniqueLock;
+// Hide a bit of the std verbosity.
+typedef std::lock_guard<std::mutex> LockGuard;
 
 } // namespace

include/sta/Property.hh

@@ -79,6 +79,7 @@ public:
   Type type() const { return type_; }
   const Unit *unit() const { return unit_; }
 
+  const char *asString(const Network *network) const;
   const char *stringValue() const { return string_; }
   float floatValue() const { return float_; }
   bool boolValue() const { return bool_; }

include/sta/Search.hh

@@ -606,6 +606,7 @@ protected:
   ExceptionFrom *filter_from_;
   ExceptionTo *filter_to_;
   VertexSet *filtered_arrivals_;
+  std::mutex filtered_arrivals_lock_;
   bool found_downstream_clk_pins_;
   PathGroups *path_groups_;
   VisitPathEnds *visit_path_ends_;

network/Network.cc

@@ -1042,13 +1042,13 @@ Network::findInstPinsHierMatching(const Instance *instance,
 				  // Return value.
 				  PinSeq &matches) const
 {
-  const char *inst_name = name(instance);
+  string inst_name = name(instance);
   InstancePinIterator *pin_iter = pinIterator(instance);
   while (pin_iter->hasNext()) {
     const Pin *pin = pin_iter->next();
     const char *port_name = name(port(pin));
     string pin_name;
-    stringPrint(pin_name, "%s%c%s", inst_name,divider_, port_name);
+    stringPrint(pin_name, "%s%c%s", inst_name.c_str(), divider_, port_name);
     if (pattern->match(pin_name.c_str()))
       matches.push_back(pin);
   }

parasitics/ConcreteParasitics.cc

@@ -920,7 +920,7 @@ ConcreteParasitics::deleteReducedParasitics(const Pin *pin)
 void
 ConcreteParasitics::deleteDrvrReducedParasitics(const Pin *drvr_pin)
 {
-  UniqueLock lock(lock_);
+  LockGuard lock(lock_);
   ConcreteParasitic **parasitics = drvr_parasitic_map_[drvr_pin];
   if (parasitics) {
     int ap_count = corners_->parasiticAnalysisPtCount();
@@ -936,7 +936,7 @@ void
 ConcreteParasitics::deleteDrvrReducedParasitics(const Pin *drvr_pin,
                                                 const ParasiticAnalysisPt *ap)
 {
-  UniqueLock lock(lock_);
+  LockGuard lock(lock_);
   ConcreteParasitic **parasitics = drvr_parasitic_map_[drvr_pin];
   if (parasitics) {
     int ap_index = ap->index();
@@ -961,7 +961,7 @@ ConcreteParasitics::findPiElmore(const Pin *drvr_pin,
 {
   if (!drvr_parasitic_map_.empty()) {
     int ap_rf_index = parasiticAnalysisPtIndex(ap, rf);
-    UniqueLock lock(lock_);
+    LockGuard lock(lock_);
     ConcreteParasitic **parasitics = drvr_parasitic_map_.findKey(drvr_pin);
     if (parasitics) {
       ConcreteParasitic *parasitic = parasitics[ap_rf_index];
@@ -980,7 +980,7 @@ ConcreteParasitics::makePiElmore(const Pin *drvr_pin,
 				 float rpi,
 				 float c1)
 {
-  UniqueLock lock(lock_);
+  LockGuard lock(lock_);
   ConcreteParasitic **parasitics = drvr_parasitic_map_.findKey(drvr_pin);
   if (parasitics == nullptr) {
     int ap_count = corners_->parasiticAnalysisPtCount();
@@ -1077,7 +1077,7 @@ ConcreteParasitics::findPiPoleResidue(const Pin *drvr_pin,
 {
   if (!drvr_parasitic_map_.empty()) {
     int ap_rf_index = parasiticAnalysisPtIndex(ap, rf);
-    UniqueLock lock(lock_);
+    LockGuard lock(lock_);
     ConcreteParasitic **parasitics = drvr_parasitic_map_.findKey(drvr_pin);
     if (parasitics) {
       ConcreteParasitic *parasitic = parasitics[ap_rf_index];
@@ -1100,7 +1100,7 @@ ConcreteParasitics::makePiPoleResidue(const Pin *drvr_pin,
 				      float rpi,
 				      float c1)
 {
-  UniqueLock lock(lock_);
+  LockGuard lock(lock_);
   ConcreteParasitic **parasitics = drvr_parasitic_map_.findKey(drvr_pin);
   if (parasitics == nullptr) {
     int ap_count = corners_->parasiticAnalysisPtCount();
@@ -1194,7 +1194,7 @@ ConcreteParasitics::findParasiticNetwork(const Net *net,
 					 const ParasiticAnalysisPt *ap) const
 {
   if (!parasitic_network_map_.empty()) {
-    UniqueLock lock(lock_);
+    LockGuard lock(lock_);
     if (!parasitic_network_map_.empty()) {
       ConcreteParasiticNetwork **parasitics=parasitic_network_map_.findKey(net);
       if (parasitics) {
@@ -1213,7 +1213,7 @@ ConcreteParasitics::findParasiticNetwork(const Pin *pin,
 					 const ParasiticAnalysisPt *ap) const
 {
   if (!parasitic_network_map_.empty()) {
-    UniqueLock lock(lock_);
+    LockGuard lock(lock_);
     if (!parasitic_network_map_.empty()) {
       // Only call findParasiticNet if parasitics exist.
       const Net *net = findParasiticNet(pin);
@@ -1234,7 +1234,7 @@ ConcreteParasitics::makeParasiticNetwork(const Net *net,
 					 bool includes_pin_caps,
 					 const ParasiticAnalysisPt *ap)
 {
-  UniqueLock lock(lock_);
+  LockGuard lock(lock_);
   ConcreteParasiticNetwork **parasitics = parasitic_network_map_.findKey(net);
   if (parasitics == nullptr) {
     int ap_count = corners_->parasiticAnalysisPtCount();
@@ -1260,7 +1260,7 @@ ConcreteParasitics::deleteParasiticNetwork(const Net *net,
 					   const ParasiticAnalysisPt *ap)
 {
   if (!parasitic_network_map_.empty()) {
-    UniqueLock lock(lock_);
+    LockGuard lock(lock_);
     ConcreteParasiticNetwork **parasitics = parasitic_network_map_.findKey(net);
     if (parasitics) {
       int ap_index = ap->index();
@@ -1287,7 +1287,7 @@ void
 ConcreteParasitics::deleteParasiticNetworks(const Net *net)
 {
   if (!parasitic_network_map_.empty()) {
-    UniqueLock lock(lock_);
+    LockGuard lock(lock_);
     ConcreteParasiticNetwork **parasitics = parasitic_network_map_.findKey(net);
     if (parasitics) {
       int ap_count = corners_->parasiticAnalysisPtCount();

sdc/Sdc.cc

@@ -2338,7 +2338,7 @@ CycleAccting *
 Sdc::cycleAccting(const ClockEdge *src,
 		  const ClockEdge *tgt)
 {
-  UniqueLock lock(cycle_acctings_lock_);
+  LockGuard lock(cycle_acctings_lock_);
   return cycle_acctings_.cycleAccting(src, tgt);
 }
 

search/Bfs.cc

@@ -256,7 +256,7 @@ BfsIterator::enqueue(Vertex *vertex)
   debugPrint(debug_, "bfs", 2, "enqueue %s", vertex->name(sdc_network_));
   if (!vertex->bfsInQueue(bfs_index_)) {
     Level level = vertex->level();
-    UniqueLock lock(queue_lock_);
+    LockGuard lock(queue_lock_);
     if (!vertex->bfsInQueue(bfs_index_)) {
       vertex->setBfsInQueue(bfs_index_, true);
       queue_[level].push_back(vertex);

search/PathGroup.cc

@@ -121,7 +121,7 @@ PathGroup::savable(PathEnd *path_end)
 void
 PathGroup::insert(PathEnd *path_end)
 {
-  UniqueLock lock(lock_);
+  LockGuard lock(lock_);
   path_ends_.push_back(path_end);
   if (group_count_ != group_count_max
       && static_cast<int>(path_ends_.size()) > group_count_ * 2)
@@ -190,7 +190,7 @@ PathGroup::sort()
 void
 PathGroup::clear()
 {
-  UniqueLock lock(lock_);
+  LockGuard lock(lock_);
   threshold_ = min_max_->initValue();
   path_ends_.clear();
 }

search/Property.cc

@@ -576,6 +576,50 @@ PropertyValue::operator=(PropertyValue &&value)
   return *this;
 }
 
+const char *
+PropertyValue::asString(const Network *network) const
+{
+  switch (type_) {
+  case Type::type_string:
+    return string_;
+  case Type::type_float:
+    return unit_->asString(float_, 6);
+  case Type::type_bool:
+    // true/false would be better but these are TCL true/false values.
+    if (bool_)
+      return "1";
+    else
+      return "0";
+  case Type::type_liberty_library:
+    return liberty_library_->name();
+  case Type::type_liberty_cell:
+    return liberty_cell_->name();
+  case Type::type_liberty_port:
+    return liberty_port_->name();
+  case Type::type_library:
+    return network->name(library_);
+  case Type::type_cell:
+    return network->name(cell_);
+  case Type::type_port:
+    return network->name(port_);
+  case Type::type_instance:
+    return network->pathName(inst_);
+  case Type::type_pin:
+    return network->pathName(pin_);
+  case Type::type_net:
+    return network->pathName(net_);
+  case Type::type_clk:
+    return clk_->name();
+  case Type::type_none:
+  case Type::type_pins:
+  case Type::type_clks:
+  case Type::type_path_refs:
+  case Type::type_pwr_activity:
+    return nullptr;
+  }
+  return nullptr;
+}
+
 ////////////////////////////////////////////////////////////////
 
 PropertyValue

search/Search.cc

@@ -748,7 +748,7 @@ Search::arrivalInvalid(Vertex *vertex)
                vertex->name(sdc_network_));
     if (!arrival_iter_->inQueue(vertex)) {
       // Lock for StaDelayCalcObserver called by delay calc threads.
-      UniqueLock lock(invalid_arrivals_lock_);
+      LockGuard lock(invalid_arrivals_lock_);
       invalid_arrivals_->insert(vertex);
     }
     tnsInvalid(vertex);
@@ -818,7 +818,7 @@ Search::requiredInvalid(Vertex *vertex)
                vertex->name(sdc_network_));
     if (!required_iter_->inQueue(vertex)) {
       // Lock for StaDelayCalcObserver called by delay calc threads.
-      UniqueLock lock(invalid_arrivals_lock_);
+      LockGuard lock(invalid_arrivals_lock_);
       invalid_requireds_->insert(vertex);
     }
     tnsInvalid(vertex);
@@ -1379,7 +1379,7 @@ Search::enqueueLatchDataOutputs(Vertex *vertex)
     Edge *out_edge = out_edge_iter.next();
     if (latches_->isLatchDtoQ(out_edge)) {
       Vertex *out_vertex = out_edge->to(graph_);
-      UniqueLock lock(pending_latch_outputs_lock_);
+      LockGuard lock(pending_latch_outputs_lock_);
       pending_latch_outputs_->insert(out_vertex);
     }
   }
@@ -2623,7 +2623,7 @@ TagGroup *
 Search::findTagGroup(TagGroupBldr *tag_bldr)
 {
   TagGroup probe(tag_bldr);
-  UniqueLock lock(tag_group_lock_);
+  LockGuard lock(tag_group_lock_);
   TagGroup *tag_group = tag_group_set_->findKey(&probe);
   if (tag_group == nullptr) {
     TagGroupIndex tag_group_index;
@@ -2686,8 +2686,10 @@ Search::setVertexArrivals(Vertex *vertex,
       }
       tag_bldr->copyArrivals(tag_group, prev_arrivals, prev_paths);
       vertex->setTagGroupIndex(tag_group->index());
-      if (tag_group->hasFilterTag())
+      if (tag_group->hasFilterTag()) {
+        LockGuard lock(this->filtered_arrivals_lock_);
         filtered_arrivals_->insert(vertex);
+      }
 
       if (has_requireds) {
 	requiredInvalid(vertex);
@@ -2712,8 +2714,10 @@ Search::setVertexArrivals(Vertex *vertex,
       tag_bldr->copyArrivals(tag_group, arrivals, prev_paths);
 
       vertex->setTagGroupIndex(tag_group->index());
-      if (tag_group->hasFilterTag())
+      if (tag_group->hasFilterTag()) {
+        LockGuard lock(this->filtered_arrivals_lock_);
         filtered_arrivals_->insert(vertex);
+      }
     }
   }
 }
@@ -2853,7 +2857,7 @@ Search::findTag(const RiseFall *rf,
 {
   Tag probe(0, rf->index(), path_ap->index(), clk_info, is_clk, input_delay,
 	    is_segment_start, states, false, this);
-  UniqueLock lock(tag_lock_);
+  LockGuard lock(tag_lock_);
   Tag *tag = tag_set_->findKey(&probe);
   if (tag == nullptr) {
     ExceptionStateSet *new_states = !own_states && states
@@ -2944,7 +2948,7 @@ Search::findClkInfo(const ClockEdge *clk_edge,
   ClkInfo probe(clk_edge, clk_src, is_propagated, gen_clk_src, gen_clk_src_path,
 		pulse_clk_sense, insertion, latency, uncertainties,
 		path_ap->index(), crpr_clk_path_rep, this);
-  UniqueLock lock(clk_info_lock_);
+  LockGuard lock(clk_info_lock_);
   ClkInfo *clk_info = clk_info_set_->findKey(&probe);
   if (clk_info == nullptr) {
     clk_info = new ClkInfo(clk_edge, clk_src,
@@ -3718,7 +3722,7 @@ Search::tnsInvalid(Vertex *vertex)
       && isEndpoint(vertex)) {
     debugPrint(debug_, "tns", 2, "tns invalid %s",
                vertex->name(sdc_network_));
-    UniqueLock lock(tns_lock_);
+    LockGuard lock(tns_lock_);
     invalid_tns_->insert(vertex);
   }
 }

search/Sim.cc

@@ -81,7 +81,7 @@ Sim::functionSense(const FuncExpr *expr,
              expr->asString());
   bool increasing, decreasing;
   {
-    UniqueLock lock(bdd_lock_);
+    LockGuard lock(bdd_lock_);
     DdNode *bdd = funcBddSim(expr, inst);
     DdManager *cudd_mgr = bdd_.cuddMgr();
     LibertyPort *input_port = network_->libertyPort(input_pin);
@@ -111,7 +111,7 @@ LogicValue
 Sim::evalExpr(const FuncExpr *expr,
 	      const Instance *inst)
 {
-  UniqueLock lock(bdd_lock_);
+  LockGuard lock(bdd_lock_);
   DdNode *bdd = funcBddSim(expr, inst);
   LogicValue value = LogicValue::unknown;
   DdManager *cudd_mgr = bdd_.cuddMgr();

search/WorstSlack.cc

@@ -120,7 +120,7 @@ WorstSlack::WorstSlack(const WorstSlack &worst_slack) :
 void
 WorstSlack::deleteVertexBefore(Vertex *vertex)
 {
-  UniqueLock lock(lock_);
+  LockGuard lock(lock_);
   if (vertex == worst_vertex_) {
     worst_vertex_ = nullptr;
     worst_slack_ = slack_init_;
@@ -269,7 +269,7 @@ WorstSlack::updateWorstSlack(Vertex *vertex,
 
   // Locking is required because ArrivalVisitor is called by multiple
   // threads.
-  UniqueLock lock(lock_);
+  LockGuard lock(lock_);
   if (worst_vertex_
       && delayLess(slack, worst_slack_, this))
     setWorstSlack(vertex, slack);

search/WriteSpice.cc

@@ -550,7 +550,7 @@ WriteSpice::writeDrvrParasitics(const Pin *drvr_pin,
     if (parasitic)
       writePiElmore(drvr_pin, parasitic);
     else {
-      streamPrint(spice_stream_, "* No parasitics found for this net.\n");
+      streamPrint(spice_stream_, "* Net has no parasitics.\n");
       writeNullParasitic(drvr_pin);
     }
   }
@@ -605,6 +605,27 @@ WriteSpice::writeParasiticNetwork(const Pin *drvr_pin,
   }
   delete pin_iter;
 
+  // Sort nodes for consistent regression results.
+  ParasiticNodeSeq nodes = parasitics_->nodes(parasitic);
+  sort(nodes.begin(), nodes.end(),
+       [=] (const ParasiticNode *node1,
+            const ParasiticNode *node2) {
+         const char *name1 = parasitics_->name(node1);
+         const char *name2 = parasitics_->name(node2);
+         return stringLess(name1, name2);
+       });
+
+  for (ParasiticNode *node : nodes) {
+    float cap = parasitics_->nodeGndCap(node);
+    // Spice has a cow over zero value caps.
+    if (cap > 0.0) {
+      streamPrint(spice_stream_, "C%d %s 0 %.3e\n",
+                  cap_index_++,
+                  nodeName(node),
+                  cap);
+    }
+  }
+
   // Sort coupling capacitors consistent regression results.
   ParasiticCapacitorSeq capacitors = parasitics_->capacitors(parasitic);
   sort(capacitors.begin(), capacitors.end(),
@@ -636,27 +657,6 @@ WriteSpice::writeParasiticNetwork(const Pin *drvr_pin,
                   coupling_name,
                   cap);
   }
-
-  // Sort nodes for consistent regression results.
-  ParasiticNodeSeq nodes = parasitics_->nodes(parasitic);
-  sort(nodes.begin(), nodes.end(),
-       [=] (const ParasiticNode *node1,
-            const ParasiticNode *node2) {
-         const char *name1 = parasitics_->name(node1);
-         const char *name2 = parasitics_->name(node2);
-         return stringLess(name1, name2);
-       });
-
-  for (ParasiticNode *node : nodes) {
-    float cap = parasitics_->nodeGndCap(node);
-    // Spice has a cow over zero value caps.
-    if (cap > 0.0) {
-      streamPrint(spice_stream_, "C%d %s 0 %.3e\n",
-                  cap_index_++,
-                  nodeName(node),
-                  cap);
-    }
-  }
 }
 
 Net *
@@ -691,7 +691,7 @@ WriteSpice::nodeName(const ParasiticNode *node)
       node_index = index_itr->second;
     const Net *net = parasitics_->net(node, network_);
     const char *net_name = network_->pathName(net);
-    return stringPrintTmp("%s/%d", net_name, node_index);
+    return stringPrintTmp("%s:%d", net_name, node_index);
   }
 }
 

tcl/StaTcl.i

@@ -1175,7 +1175,7 @@ filter_pins(const char *property,
     bool not_match = stringEq(op, "!=");
     for (const Pin *pin : *pins) {
       PropertyValue value(getProperty(pin, property, sta));
-      const char *prop = value.stringValue();
+      const char *prop = value.asString(sta->sdcNetwork());
       if (prop &&
           ((exact_match && stringEq(prop, pattern))
            || (not_match && !stringEq(prop, pattern))

test/regression.tcl

@@ -187,7 +187,7 @@ proc run_test { test } {
 	  puts " pass$error_msg"
 	}
       } else {
-	puts " *NO OK FILE*$error_msg"
+        puts " *NO OK FILE*"
 	append_failure $test
 	incr errors(no_ok)
       }

util/StringUtil.cc

@@ -191,7 +191,7 @@ getTmpString(// Return values.
 	     char *&str,
 	     size_t &length)
 {
-  UniqueLock lock(string_lock_);
+  LockGuard lock(string_lock_);
   if (tmp_string_next_ == tmp_string_count_)
     tmp_string_next_ = 0;
   str = tmp_strings_[tmp_string_next_];
@@ -202,7 +202,7 @@ getTmpString(// Return values.
 char *
 makeTmpString(size_t length)
 {
-  UniqueLock lock(string_lock_);
+  LockGuard lock(string_lock_);
   if (tmp_string_next_ == tmp_string_count_)
     tmp_string_next_ = 0;
   char *tmp_str = tmp_strings_[tmp_string_next_];

verilog/VerilogWriter.cc

@@ -418,7 +418,7 @@ VerilogWriter::writeAssigns(Instance *inst)
         && (include_pwr_gnd_
             || !(network_->isPower(net) || network_->isGround(net)))
         && (network_->direction(port)->isAnyOutput()
-            || network_->direction(port)->isPowerGround())
+            || (include_pwr_gnd_ && network_->direction(port)->isPowerGround()))
         && !stringEqual(network_->name(port), network_->name(net))) {
       // Port name is different from net name.
       string port_vname = netVerilogName(network_->name(port),