report_clock_min_period ignore mcp/path delays
Signed-off-by: James Cherry <cherry@parallaxsw.com>
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doc/OpenSTA.odt
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@ -3073,16 +3073,21 @@ MinPeriodEndVisitor::copy()
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void
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void
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MinPeriodEndVisitor::visit(PathEnd *path_end)
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MinPeriodEndVisitor::visit(PathEnd *path_end)
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{
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{
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Network *network = sta_->network();
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Path *path = path_end->path();
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Path *path = path_end->path();
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ClockEdge *src_edge = path_end->sourceClkEdge(sta_);
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ClockEdge *src_edge = path_end->sourceClkEdge(sta_);
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ClockEdge *tgt_edge = path_end->targetClkEdge(sta_);
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ClockEdge *tgt_edge = path_end->targetClkEdge(sta_);
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if (path->minMax(sta_) == MinMax::max()
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PathEnd::Type end_type = path_end->type();
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if ((end_type == PathEnd::Type::check
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|| end_type == PathEnd::Type::output_delay)
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&& path->minMax(sta_) == MinMax::max()
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&& src_edge->clock() == clk_
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&& src_edge->clock() == clk_
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&& tgt_edge->clock() == clk_
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&& tgt_edge->clock() == clk_
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// Only consider rise/rise and fall/fall paths.
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// Only consider rise/rise and fall/fall paths.
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&& src_edge->transition() == tgt_edge->transition()
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&& src_edge->transition() == tgt_edge->transition()
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&& path_end->multiCyclePath() == nullptr
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&& (include_port_paths_
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&& (include_port_paths_
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|| !(path_end->isOutputDelay()
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|| !(network->isTopLevelPort(path->pin(sta_))
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|| pathIsFromInputPort(path_end)))) {
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|| pathIsFromInputPort(path_end)))) {
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Slack slack = path_end->slack(sta_);
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Slack slack = path_end->slack(sta_);
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float period = clk_->period() - slack;
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float period = clk_->period() - slack;
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@ -1087,7 +1087,7 @@ proc report_clock_min_period { args } {
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if { [info exists keys(-clocks)] } {
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if { [info exists keys(-clocks)] } {
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set clks [get_clocks $keys(-clocks)]
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set clks [get_clocks $keys(-clocks)]
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} else {
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} else {
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set clks [all_clocks]
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set clks [sort_by_name [all_clocks]]
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}
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}
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set include_port_paths [info exists flags(-include_port_paths)]
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set include_port_paths [info exists flags(-include_port_paths)]
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