report_check_types -max_capacitance respect set_driving_cell cap limit
Signed-off-by: James Cherry <cherry@parallaxsw.com>
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50866cfaf5
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5e506940a7
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@ -20,6 +20,7 @@
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#include "Liberty.hh"
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#include "Network.hh"
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#include "Sdc.hh"
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#include "InputDrive.hh"
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#include "DcalcAnalysisPt.hh"
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#include "GraphDelayCalc.hh"
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#include "StaState.hh"
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@ -164,6 +165,32 @@ CheckCapacitanceLimits::findLimit(const Pin *pin,
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limit = limit1;
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exists = true;
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}
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InputDrive *drive = sdc->findInputDrive(port);
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if (drive) {
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for (auto min_max : MinMax::range()) {
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for (auto rf : RiseFall::range()) {
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LibertyCell *cell;
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LibertyPort *from_port;
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float *from_slews;
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LibertyPort *to_port;
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drive->driveCell(rf, min_max, cell, from_port, from_slews, to_port);
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if (to_port) {
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LibertyPort *corner_port = to_port->cornerPort(corner->libertyIndex(min_max));
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corner_port->capacitanceLimit(min_max, limit1, exists1);
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if (!exists1
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&& corner_port->direction()->isAnyOutput()
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&& min_max == MinMax::max())
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corner_port->libertyLibrary()->defaultMaxSlew(limit1, exists1);
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if (exists1
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&& (!exists
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|| min_max->compare(limit, limit1))) {
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limit = limit1;
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exists = true;
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}
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}
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}
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}
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}
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}
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else {
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Cell *cell = network->cell(network->instance(pin));
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@ -314,7 +341,7 @@ CheckCapacitanceLimits::checkPin(Pin *pin)
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const Sdc *sdc = sta_->sdc();
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const Graph *graph = sta_->graph();
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Vertex *vertex = graph->pinLoadVertex(pin);
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return network->direction(pin)->isAnyOutput()
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return network->isDriver(pin)
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&& !sim->logicZeroOne(pin)
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&& !sdc->isDisabled(pin)
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&& !(vertex && sta_->isIdealClock(pin));
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