get_* -filter allow true/false, '.' in glob pattern resolves #416
Signed-off-by: James Cherry <cherry@parallaxsw.com>
This commit is contained in:
parent
d6e826ef8b
commit
548b665412
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@ -40,67 +40,56 @@ class Report;
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PortSeq
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filterPorts(std::string_view filter_expression,
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PortSeq *objects,
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bool bool_props_as_int,
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Sta *sta);
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InstanceSeq
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filterInstances(std::string_view filter_expression,
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InstanceSeq *objects,
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bool bool_props_as_int,
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Sta *sta);
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PinSeq
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filterPins(std::string_view filter_expression,
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PinSeq *objects,
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bool bool_props_as_int,
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Sta *sta);
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NetSeq
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filterNets(std::string_view filter_expression,
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NetSeq *objects,
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bool bool_props_as_int,
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Sta *sta);
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ClockSeq
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filterClocks(std::string_view filter_expression,
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ClockSeq *objects,
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bool bool_props_as_int,
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Sta *sta);
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LibertyCellSeq
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filterLibCells(std::string_view filter_expression,
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LibertyCellSeq *objects,
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bool bool_props_as_int,
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Sta *sta);
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LibertyPortSeq
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filterLibPins(std::string_view filter_expression,
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LibertyPortSeq *objects,
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bool bool_props_as_int,
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Sta *sta);
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LibertyLibrarySeq
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filterLibertyLibraries(std::string_view filter_expression,
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LibertyLibrarySeq *objects,
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bool bool_props_as_int,
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Sta *sta);
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EdgeSeq
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filterTimingArcs(std::string_view filter_expression,
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EdgeSeq *objects,
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bool bool_props_as_int,
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Sta *sta);
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PathEndSeq
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filterPathEnds(std::string_view filter_expression,
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PathEndSeq *objects,
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bool bool_props_as_int,
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Sta *sta);
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// For FilterExpr unit tests.
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StringSeq
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filterExprToPostfix(std::string_view expr,
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bool bool_props_as_int,
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Report *report);
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} // namespace
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@ -73,9 +73,9 @@ public:
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FilterExpr(std::string_view expression,
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Report *report);
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std::vector<std::unique_ptr<Token>> postfix(bool bool_props_as_int);
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std::vector<std::unique_ptr<Token>> postfix();
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private:
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std::vector<std::unique_ptr<Token>> lex(bool bool_props_as_int);
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std::vector<std::unique_ptr<Token>> lex();
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std::vector<std::unique_ptr<Token>> shuntingYard(std::vector<std::unique_ptr<Token>> &infix);
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std::string raw_;
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@ -106,20 +106,21 @@ FilterExpr::FilterExpr(std::string_view expression,
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}
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std::vector<std::unique_ptr<FilterExpr::Token>>
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FilterExpr::postfix(bool bool_props_as_int)
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FilterExpr::postfix()
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{
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auto infix = lex(bool_props_as_int);
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auto infix = lex();
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return shuntingYard(infix);
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}
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std::vector<std::unique_ptr<FilterExpr::Token>>
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FilterExpr::lex(bool bool_props_as_int)
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FilterExpr::lex()
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{
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std::vector<std::pair<std::regex, Token::Kind>> token_regexes = {
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{std::regex("^\\s+"), Token::Kind::skip},
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{std::regex("^defined\\(([a-zA-Z_]+)\\)"), Token::Kind::defined},
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{std::regex("^undefined\\(([a-zA-Z_]+)\\)"), Token::Kind::undefined},
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{std::regex("^@?([a-zA-Z_]+) *((==|!=|=~|!~) *([0-9a-zA-Z_\\/$\\[\\]*?]+))?"), Token::Kind::predicate},
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{std::regex("^@?([a-zA-Z_]+) *((==|!=|=~|!~) *([0-9a-zA-Z_\\/$\\[\\]*?.]+))?"),
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Token::Kind::predicate},
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{std::regex("^(&&)"), Token::Kind::op_and},
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{std::regex("^(\\|\\|)"), Token::Kind::op_or},
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{std::regex("^(!)"), Token::Kind::op_inv},
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@ -139,9 +140,9 @@ FilterExpr::lex(bool bool_props_as_int)
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std::string property = token_match[1].str();
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// The default operation on a predicate if an op and arg are
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// omitted is 'arg == 1' / 'arg == true'.
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// omitted is 'prop == 1 || true'.
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std::string op = "==";
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std::string arg = (bool_props_as_int ? "1" : "true");
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std::string arg = "1";
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if (token_match[2].length() != 0) {
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op = token_match[3].str();
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@ -250,13 +251,18 @@ filterObjects(const char *property,
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bool not_pattern_match = stringEq(op, "!~");
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for (T *object : all) {
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PropertyValue value = properties.getProperty(object, property);
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std::string prop_str = value.to_string(network);
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const char *prop = prop_str.c_str();
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if (prop &&
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((exact_match && stringEq(prop, pattern))
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|| (not_match && !stringEq(prop, pattern))
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|| (pattern_match && patternMatch(pattern, prop))
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|| (not_pattern_match && !patternMatch(pattern, prop))))
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std::string prop = value.to_string(network);
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if (value.type() == PropertyValue::Type::bool_) {
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// Canonicalize bool true/false to 1/0.
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if (stringEqual(pattern, "true"))
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pattern = "1";
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else if (stringEqual(pattern, "false"))
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pattern = "0";
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}
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if ((exact_match && stringEq(prop.c_str(), pattern))
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|| (not_match && !stringEq(prop.c_str(), pattern))
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|| (pattern_match && patternMatch(pattern, prop))
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|| (not_pattern_match && !patternMatch(pattern, prop)))
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filtered_objects.insert(object);
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}
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return filtered_objects;
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@ -265,7 +271,6 @@ filterObjects(const char *property,
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template <typename T> std::vector<T*>
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filterObjects(std::string_view filter_expression,
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std::vector<T*> *objects,
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bool bool_props_as_int,
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Sta *sta)
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{
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Report *report = sta->report();
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@ -278,7 +283,7 @@ filterObjects(std::string_view filter_expression,
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all.insert(object);
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FilterExpr filter(filter_expression, report);
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auto postfix = filter.postfix(bool_props_as_int);
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auto postfix = filter.postfix();
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std::stack<std::set<T*>> eval_stack;
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for (auto &token : postfix) {
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if (token->kind == FilterExpr::Token::Kind::op_or) {
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@ -405,100 +410,89 @@ filterObjects(std::string_view filter_expression,
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PortSeq
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filterPorts(std::string_view filter_expression,
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PortSeq *objects,
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bool bool_props_as_int,
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Sta *sta)
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{
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return filterObjects<const Port>(filter_expression, objects, bool_props_as_int, sta);
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return filterObjects<const Port>(filter_expression, objects, sta);
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}
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InstanceSeq
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filterInstances(std::string_view filter_expression,
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InstanceSeq *objects,
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bool bool_props_as_int,
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Sta *sta)
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{
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return filterObjects<const Instance>(filter_expression, objects, bool_props_as_int, sta);
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return filterObjects<const Instance>(filter_expression, objects, sta);
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}
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PinSeq
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filterPins(std::string_view filter_expression,
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PinSeq *objects,
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bool bool_props_as_int,
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Sta *sta)
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{
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return filterObjects<const Pin>(filter_expression, objects, bool_props_as_int, sta);
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return filterObjects<const Pin>(filter_expression, objects, sta);
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}
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NetSeq
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filterNets(std::string_view filter_expression,
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NetSeq *objects,
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bool bool_props_as_int,
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Sta *sta)
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{
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return filterObjects<const Net>(filter_expression, objects, bool_props_as_int, sta);
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return filterObjects<const Net>(filter_expression, objects, sta);
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}
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ClockSeq
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filterClocks(std::string_view filter_expression,
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ClockSeq *objects,
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bool bool_props_as_int,
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Sta *sta)
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{
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return filterObjects<Clock>(filter_expression, objects, bool_props_as_int, sta);
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return filterObjects<Clock>(filter_expression, objects, sta);
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}
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LibertyCellSeq
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filterLibCells(std::string_view filter_expression,
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LibertyCellSeq *objects,
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bool bool_props_as_int,
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Sta *sta)
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{
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return filterObjects<LibertyCell>(filter_expression, objects, bool_props_as_int, sta);
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return filterObjects<LibertyCell>(filter_expression, objects, sta);
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}
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LibertyPortSeq
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filterLibPins(std::string_view filter_expression,
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LibertyPortSeq *objects,
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bool bool_props_as_int,
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Sta *sta)
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{
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return filterObjects<LibertyPort>(filter_expression, objects, bool_props_as_int, sta);
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return filterObjects<LibertyPort>(filter_expression, objects, sta);
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}
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LibertyLibrarySeq
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filterLibertyLibraries(std::string_view filter_expression,
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LibertyLibrarySeq *objects,
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bool bool_props_as_int,
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Sta *sta)
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{
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return filterObjects<LibertyLibrary>(filter_expression, objects, bool_props_as_int, sta);
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return filterObjects<LibertyLibrary>(filter_expression, objects, sta);
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}
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EdgeSeq
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filterTimingArcs(std::string_view filter_expression,
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EdgeSeq *objects,
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bool bool_props_as_int,
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Sta *sta)
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{
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return filterObjects<Edge>(filter_expression, objects, bool_props_as_int, sta);
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return filterObjects<Edge>(filter_expression, objects, sta);
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}
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PathEndSeq
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filterPathEnds(std::string_view filter_expression,
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PathEndSeq *objects,
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bool bool_props_as_int,
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Sta *sta)
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{
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return filterObjects<PathEnd>(filter_expression, objects, bool_props_as_int, sta);
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return filterObjects<PathEnd>(filter_expression, objects, sta);
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}
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StringSeq
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filterExprToPostfix(std::string_view expr,
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bool bool_props_as_int,
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Report *report)
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{
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FilterExpr filter(expr, report);
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auto postfix = filter.postfix(bool_props_as_int);
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auto postfix = filter.postfix();
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StringSeq result;
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for (auto &token : postfix)
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result.push_back(token->text);
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55
sdc/Sdc.i
55
sdc/Sdc.i
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@ -1493,101 +1493,90 @@ find_register_output_pins(ClockSet *clks,
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PortSeq
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filter_ports(const char *filter_expression,
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PortSeq *ports,
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bool bool_props_as_int)
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PortSeq *ports)
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{
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sta::Sta *sta = Sta::sta();
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return filterPorts(filter_expression, ports, bool_props_as_int, sta);
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return filterPorts(filter_expression, ports, sta);
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}
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InstanceSeq
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filter_insts(const char *filter_expression,
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InstanceSeq *insts,
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bool bool_props_as_int)
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InstanceSeq *insts)
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{
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sta::Sta *sta = Sta::sta();
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return filterInstances(filter_expression, insts, bool_props_as_int, sta);
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return filterInstances(filter_expression, insts, sta);
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}
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PinSeq
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filter_pins(const char *filter_expression,
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PinSeq *pins,
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bool bool_props_as_int)
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PinSeq *pins)
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{
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sta::Sta *sta = Sta::sta();
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return filterPins(filter_expression, pins, bool_props_as_int, sta);
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return filterPins(filter_expression, pins, sta);
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}
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NetSeq
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filter_nets(const char *filter_expression,
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NetSeq *nets,
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bool bool_props_as_int)
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NetSeq *nets)
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{
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sta::Sta *sta = Sta::sta();
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return filterNets(filter_expression, nets, bool_props_as_int, sta);
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return filterNets(filter_expression, nets, sta);
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}
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ClockSeq
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filter_clocks(const char *filter_expression,
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ClockSeq *clocks,
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bool bool_props_as_int)
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ClockSeq *clocks)
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{
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sta::Sta *sta = Sta::sta();
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return filterClocks(filter_expression, clocks, bool_props_as_int, sta);
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return filterClocks(filter_expression, clocks, sta);
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}
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LibertyCellSeq
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filter_lib_cells(const char *filter_expression,
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LibertyCellSeq *cells,
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bool bool_props_as_int)
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LibertyCellSeq *cells)
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{
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sta::Sta *sta = Sta::sta();
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return filterLibCells(filter_expression, cells, bool_props_as_int, sta);
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return filterLibCells(filter_expression, cells, sta);
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}
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LibertyPortSeq
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filter_lib_pins(const char *filter_expression,
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LibertyPortSeq *pins,
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bool bool_props_as_int)
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LibertyPortSeq *pins)
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{
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sta::Sta *sta = Sta::sta();
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return filterLibPins(filter_expression, pins, bool_props_as_int, sta);
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return filterLibPins(filter_expression, pins, sta);
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}
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LibertyLibrarySeq
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filter_liberty_libraries(const char *filter_expression,
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LibertyLibrarySeq *libs,
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bool bool_props_as_int)
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LibertyLibrarySeq *libs)
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{
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sta::Sta *sta = Sta::sta();
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return filterLibertyLibraries(filter_expression, libs, bool_props_as_int, sta);
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return filterLibertyLibraries(filter_expression, libs, sta);
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}
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EdgeSeq
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filter_timing_arcs(const char *filter_expression,
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EdgeSeq *edges,
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bool bool_props_as_int)
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EdgeSeq *edges)
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{
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sta::Sta *sta = Sta::sta();
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return filterTimingArcs(filter_expression, edges, bool_props_as_int, sta);
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return filterTimingArcs(filter_expression, edges, sta);
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}
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PathEndSeq
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filter_path_ends(const char *filter_expression,
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PathEndSeq *path_ends,
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bool bool_props_as_int)
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PathEndSeq *path_ends)
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{
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sta::Sta *sta = Sta::sta();
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return filterPathEnds(filter_expression, path_ends, bool_props_as_int, sta);
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return filterPathEnds(filter_expression, path_ends, sta);
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}
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// For FilterExpr unit tests.
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StringSeq
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filter_expr_to_postfix(const char* expr,
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bool bool_props_as_int)
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filter_expr_to_postfix(const char* expr)
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{
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Report *report = Sta::sta()->report();
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return filterExprToPostfix(expr, bool_props_as_int, report);
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return filterExprToPostfix(expr, report);
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}
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////////////////////////////////////////////////////////////////
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16
sdc/Sdc.tcl
16
sdc/Sdc.tcl
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@ -393,7 +393,7 @@ proc get_cells { args } {
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}
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}
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if [info exists keys(-filter)] {
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set insts [filter_insts $keys(-filter) $insts 1]
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set insts [filter_insts $keys(-filter) $insts]
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}
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return $insts
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}
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@ -436,7 +436,7 @@ proc get_clocks { args } {
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}
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}
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if [info exists keys(-filter)] {
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set clocks [filter_clocks $keys(-filter) $clocks 1]
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set clocks [filter_clocks $keys(-filter) $clocks]
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}
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return $clocks
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}
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@ -517,7 +517,7 @@ proc get_lib_cells { args } {
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}
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}
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if [info exists keys(-filter)] {
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set cells [filter_lib_cells $keys(-filter) $cells 1]
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set cells [filter_lib_cells $keys(-filter) $cells]
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}
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return $cells
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}
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@ -621,7 +621,7 @@ proc get_lib_pins { args } {
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}
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}
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if [info exists keys(-filter)] {
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set ports [filter_lib_pins $keys(-filter) $ports 1]
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set ports [filter_lib_pins $keys(-filter) $ports]
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}
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return $ports
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}
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@ -671,7 +671,7 @@ proc get_libs { args } {
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}
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}
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if [info exists keys(-filter)] {
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set libs [filter_liberty_libraries $keys(-filter) $libs 1]
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set libs [filter_liberty_libraries $keys(-filter) $libs]
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}
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return $libs
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}
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@ -772,7 +772,7 @@ proc get_nets { args } {
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}
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}
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if [info exists keys(-filter)] {
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set nets [filter_nets $keys(-filter) $nets 1]
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set nets [filter_nets $keys(-filter) $nets]
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}
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return $nets
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}
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@ -863,7 +863,7 @@ proc get_pins { args } {
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}
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}
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if [info exists keys(-filter)] {
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set pins [filter_pins $keys(-filter) $pins 1]
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set pins [filter_pins $keys(-filter) $pins]
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}
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return $pins
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}
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||||
|
|
@ -919,7 +919,7 @@ proc get_ports { args } {
|
|||
}
|
||||
}
|
||||
if [info exists keys(-filter)] {
|
||||
set ports [filter_ports $keys(-filter) $ports 1]
|
||||
set ports [filter_ports $keys(-filter) $ports]
|
||||
}
|
||||
return $ports
|
||||
}
|
||||
|
|
|
|||
|
|
@ -564,7 +564,7 @@ PropertyValue::to_string(const Network *network) const
|
|||
case Type::float_:
|
||||
return unit_->asString(float_, 6);
|
||||
case Type::bool_:
|
||||
// true/false would be better but these are TCL true/false values.
|
||||
// These are TCL true/false values.
|
||||
if (bool_)
|
||||
return "1";
|
||||
else
|
||||
|
|
|
|||
|
|
@ -300,7 +300,7 @@ proc get_timing_edges_cmd { cmd cmd_args } {
|
|||
cmd_usage_error $cmd
|
||||
}
|
||||
if [info exists keys(-filter)] {
|
||||
set arcs [filter_timing_arcs $keys(-filter) $arcs 1]
|
||||
set arcs [filter_timing_arcs $keys(-filter) $arcs]
|
||||
}
|
||||
return $arcs
|
||||
}
|
||||
|
|
|
|||
Binary file not shown.
|
|
@ -1,24 +1,11 @@
|
|||
[get_cells -filter liberty_cell==BUFx2_ASAP7_75t_R *]
|
||||
u1
|
||||
[get_clocks -filter is_virtual==0 *]
|
||||
clk
|
||||
[get_clocks -filter is_virtual==1 *]
|
||||
vclk
|
||||
[get_clocks -filter is_virtual *]
|
||||
vclk
|
||||
[get_clocks -filter is_virtual&&is_generated *]
|
||||
[get_clocks -filter is_virtual&&is_generated==0 *]
|
||||
vclk
|
||||
[get_clocks -filter is_virtual||is_generated *]
|
||||
vclk
|
||||
[get_clocks -filter is_virtual==0||is_generated *]
|
||||
clk
|
||||
[get_lib_cells -filter is_buffer==1 *]
|
||||
[get_lib_cells -filter is_buffer *]
|
||||
asap7_small/BUFx2_ASAP7_75t_R
|
||||
[get_lib_cells -filter is_inverter==0 *]
|
||||
asap7_small/AND2x2_ASAP7_75t_R
|
||||
asap7_small/BUFx2_ASAP7_75t_R
|
||||
asap7_small/DFFHQx4_ASAP7_75t_R
|
||||
[get_lib_cells -filter is_inverter *]
|
||||
asap7_small/INVx2_ASAP7_75t_R
|
||||
[get_lib_pins -filter direction==input BUFx2_ASAP7_75t_R/*]
|
||||
A
|
||||
[get_lib_pins -filter direction==output BUFx2_ASAP7_75t_R/*]
|
||||
|
|
@ -54,9 +41,22 @@ in2
|
|||
out
|
||||
[get_cells -filter {name ~= *r1*} *]
|
||||
Error: 2600 -filter parsing failed at '~= *r1*'.
|
||||
direction == input && name =~ clk*
|
||||
clk1
|
||||
clk2
|
||||
clk3
|
||||
(direction == input) && (name =~ clk*)"
|
||||
clk1
|
||||
clk2
|
||||
clk3
|
||||
[get_clocks -filter is_virtual||is_generated *]
|
||||
vclk
|
||||
[get_clocks -filter is_virtual==0 *]
|
||||
clk
|
||||
[get_clocks -filter is_virtual==false *]
|
||||
clk
|
||||
[get_clocks -filter is_virtual==1 *]
|
||||
vclk
|
||||
[get_clocks -filter is_virtual==true *]
|
||||
vclk
|
||||
{direction == input} {name =~ clk*} {is_clock == 1} && &&
|
||||
|
|
|
|||
|
|
@ -5,29 +5,16 @@ link_design top
|
|||
create_clock -name clk -period 500 {clk1 clk2 clk3}
|
||||
create_clock -name vclk -period 1000
|
||||
|
||||
# Test filters for each SDC get_* command.
|
||||
puts {[get_cells -filter liberty_cell==BUFx2_ASAP7_75t_R *]}
|
||||
report_object_full_names [get_cells -filter liberty_cell==BUFx2_ASAP7_75t_R *]
|
||||
|
||||
puts {[get_clocks -filter is_virtual==0 *]}
|
||||
report_object_full_names [get_clocks -filter is_virtual==0 *]
|
||||
puts {[get_clocks -filter is_virtual==1 *]}
|
||||
report_object_full_names [get_clocks -filter is_virtual==1 *]
|
||||
puts {[get_clocks -filter is_virtual *]}
|
||||
report_object_full_names [get_clocks -filter is_virtual *]
|
||||
puts {[get_clocks -filter is_virtual&&is_generated *]}
|
||||
report_object_full_names [get_clocks -filter is_virtual&&is_generated *]
|
||||
puts {[get_clocks -filter is_virtual&&is_generated==0 *]}
|
||||
report_object_full_names [get_clocks -filter is_virtual&&is_generated==0 *]
|
||||
puts {[get_clocks -filter is_virtual||is_generated *]}
|
||||
report_object_full_names [get_clocks -filter is_virtual||is_generated *]
|
||||
puts {[get_clocks -filter is_virtual==0||is_generated *]}
|
||||
report_object_full_names [get_clocks -filter is_virtual==0||is_generated *]
|
||||
|
||||
puts {[get_lib_cells -filter is_buffer==1 *]}
|
||||
report_object_full_names [get_lib_cells -filter is_buffer==1 *]
|
||||
puts {[get_lib_cells -filter is_inverter==0 *]}
|
||||
report_object_full_names [get_lib_cells -filter is_inverter==0 *]
|
||||
puts {[get_lib_cells -filter is_buffer *]}
|
||||
report_object_full_names [get_lib_cells -filter is_buffer *]
|
||||
puts {[get_lib_cells -filter is_inverter *]}
|
||||
report_object_full_names [get_lib_cells -filter is_inverter *]
|
||||
|
||||
puts {[get_lib_pins -filter direction==input BUFx2_ASAP7_75t_R/*]}
|
||||
report_object_full_names [get_lib_pins -filter direction==input BUFx2_ASAP7_75t_R/*]
|
||||
|
|
@ -55,9 +42,32 @@ puts {[get_cells -filter {name ~= *r1*} *]}
|
|||
catch {get_cells -filter {name ~= *r1*} *} result
|
||||
puts $result
|
||||
|
||||
# AND pattern match expr
|
||||
# AND expr
|
||||
puts {direction == input && name =~ clk*}
|
||||
report_object_names [get_ports -filter "direction == input && name =~ clk*" *]
|
||||
# parens around sub-exprs
|
||||
puts {(direction == input) && (name =~ clk*)"}
|
||||
report_object_names [get_ports -filter "(direction == input) && (name =~ clk*)" *]
|
||||
|
||||
sta::filter_expr_to_postfix "direction == input && name =~ clk* && is_clock" 1
|
||||
# OR expr
|
||||
puts {[get_clocks -filter is_virtual||is_generated *]}
|
||||
report_object_full_names [get_clocks -filter is_virtual||is_generated *]
|
||||
|
||||
|
||||
# unary==0 / unary==false
|
||||
puts {[get_clocks -filter is_virtual==0 *]}
|
||||
report_object_full_names [get_clocks -filter is_virtual==0 *]
|
||||
puts {[get_clocks -filter is_virtual==false *]}
|
||||
report_object_full_names [get_clocks -filter is_virtual==false *]
|
||||
|
||||
# unary==1 / unary==true
|
||||
puts {[get_clocks -filter is_virtual==1 *]}
|
||||
report_object_full_names [get_clocks -filter is_virtual==1 *]
|
||||
puts {[get_clocks -filter is_virtual==true *]}
|
||||
report_object_full_names [get_clocks -filter is_virtual==true *]
|
||||
|
||||
# glob pattern with . (literal dot, no match symantics)
|
||||
report_object_full_names [get_cells -filter {name =~ .1} *]
|
||||
|
||||
puts [sta::filter_expr_to_postfix "direction == input && name =~ clk* && is_clock"]
|
||||
|
||||
|
|
|
|||
|
|
@ -5,6 +5,7 @@ Y
|
|||
[get_lib_pins -of_objects [get_lib_cells *]]
|
||||
A
|
||||
A
|
||||
A
|
||||
B
|
||||
CLK
|
||||
D
|
||||
|
|
@ -13,3 +14,4 @@ IQN
|
|||
Q
|
||||
Y
|
||||
Y
|
||||
Y
|
||||
|
|
|
|||
|
|
@ -11,9 +11,11 @@ vclk
|
|||
asap7_small/AND2x2_ASAP7_75t_R
|
||||
asap7_small/BUFx2_ASAP7_75t_R
|
||||
asap7_small/DFFHQx4_ASAP7_75t_R
|
||||
asap7_small/INVx2_ASAP7_75t_R
|
||||
[get_lib_pins]
|
||||
A
|
||||
A
|
||||
A
|
||||
B
|
||||
CLK
|
||||
D
|
||||
|
|
@ -22,6 +24,7 @@ IQN
|
|||
Q
|
||||
Y
|
||||
Y
|
||||
Y
|
||||
[get_libs]
|
||||
asap7_small
|
||||
[get_nets]
|
||||
|
|
|
|||
|
|
@ -9,9 +9,11 @@ vclk
|
|||
asap7_small/AND2x2_ASAP7_75t_R
|
||||
asap7_small/BUFx2_ASAP7_75t_R
|
||||
asap7_small/DFFHQx4_ASAP7_75t_R
|
||||
asap7_small/INVx2_ASAP7_75t_R
|
||||
[get_lib_pins [get_lib_pins]]
|
||||
A
|
||||
A
|
||||
A
|
||||
B
|
||||
CLK
|
||||
D
|
||||
|
|
@ -20,6 +22,7 @@ IQN
|
|||
Q
|
||||
Y
|
||||
Y
|
||||
Y
|
||||
[get_libs [get_libs]]
|
||||
asap7_small
|
||||
[get_nets [get_nets]]
|
||||
|
|
|
|||
Loading…
Reference in New Issue