write_path_spice
Signed-off-by: James Cherry <cherry@parallaxsw.com>
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@ -170,6 +170,8 @@ private:
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float slewAxisMinValue(TimingArc *arc);
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float pgPortVoltage(LibertyPgPort *pg_port);
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void writePrintStmt();
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float railToRailSlew(float slew,
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const RiseFall *rf);
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// Stage "accessors".
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//
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@ -408,11 +410,21 @@ WritePathSpice::maxTime()
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else {
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float end_slew = findSlew(path_);
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float arrival = delayAsFloat(path_->arrival(this));
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float max_time = input_slew + arrival + end_slew;
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float max_time = railToRailSlew(input_slew, rf) + arrival
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+ railToRailSlew(end_slew, rf);
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return max_time;
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}
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}
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float
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WritePathSpice::railToRailSlew(float slew,
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const RiseFall *rf)
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{
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float lower = default_library_->slewLowerThreshold(rf);
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float upper = default_library_->slewUpperThreshold(rf);
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return slew / (upper - lower);
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}
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void
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WritePathSpice::writeStageInstances()
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{
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@ -492,8 +504,11 @@ WritePathSpice::writeInputWaveform()
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const RiseFall *rf = input_path->transition(this);
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TimingArc *next_arc = stageGateArc(input_stage + 1);
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float slew0 = findSlew(input_path, rf, next_arc);
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// Arbitrary offset.
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float time0 = slew0;
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float threshold = default_library_->inputThreshold(rf);
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float dt = railToRailSlew(slew0, rf);
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float time0 = dt * threshold;
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int volt_index = 1;
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const Pin *drvr_pin = stageDrvrPin(input_stage);
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const Pin *load_pin = stageLoadPin(input_stage);
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@ -689,12 +704,11 @@ WritePathSpice::writeWaveformEdge(const RiseFall *rf,
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volt1 = gnd_voltage_;
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}
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float threshold = default_library_->inputThreshold(rf);
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float lower = default_library_->slewLowerThreshold(rf);
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float upper = default_library_->slewUpperThreshold(rf);
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float dt = slew / (upper - lower);
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float dt = railToRailSlew(slew, rf);
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float time0 = time - dt * threshold;
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float time1 = time0 + dt;
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streamPrint(spice_stream_, "+%.3e %.3e\n", time0, volt0);
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if (time0 > 0.0)
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streamPrint(spice_stream_, "+%.3e %.3e\n", time0, volt0);
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streamPrint(spice_stream_, "+%.3e %.3e\n", time1, volt1);
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}
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@ -249,7 +249,7 @@ proc report_delays_wrt_clk { vertex what clk clk_rf } {
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set rise_fmt [format_delays $rise]
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set fall_fmt [format_delays $fall]
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if {$clk != "NULL"} {
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set clk_str " ([get_name $clk] [rise_fall_short_name $clk_rf])"
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set clk_str " ([get_name $clk] [rf_short_name $clk_rf])"
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} else {
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set clk_str ""
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}
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@ -281,7 +281,7 @@ proc report_wrt_clk { vertex what clk clk_rf } {
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set rise_fmt [format_times $rise $sta_report_default_digits]
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set fall_fmt [format_times $fall $sta_report_default_digits]
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if {$clk != "NULL"} {
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set clk_str " ([get_name $clk] [rise_fall_short_name $clk_rf])"
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set clk_str " ([get_name $clk] [rf_short_name $clk_rf])"
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} else {
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set clk_str ""
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}
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@ -289,16 +289,6 @@ proc report_wrt_clk { vertex what clk clk_rf } {
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}
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}
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proc rise_fall_short_name { rf } {
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if { $rf == "rise" } {
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return [rise_short_name]
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} elseif { $rf == "fall" } {
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return [fall_short_name]
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} else {
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error "unknown transition name $rf"
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}
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}
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proc times_are_inf { times } {
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foreach time $times {
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if { $time < 1e+10 && $time > -1e+10 } {
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@ -1164,6 +1154,16 @@ proc max_fanout_check_slack_limit {} {
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################################################################
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proc rf_short_name { rf } {
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if { [rf_is_rise $rf] } {
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return [rise_short_name]
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} elseif { [rf_is_fall $rf] } {
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return [fall_short_name]
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} else {
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error "unknown transition name $rf"
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}
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}
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proc opposite_rf { rf } {
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if { [rf_is_rise $rf] } {
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return "fall"
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