search: fix truncating path ends list if sorting by slack (#291)
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Mateusz Gancarz
GitHub
parent
1731dd0c38
commit
45a8a1bcc0
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@ -546,8 +546,6 @@ PathGroups::makePathEnds(ExceptionTo *to,
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pushGroupPathEnds(path_ends);
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if (sort_by_slack) {
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sort(path_ends, PathEndLess(this));
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if (static_cast<int>(path_ends.size()) > group_path_count_)
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path_ends.resize(group_path_count_);
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}
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if (unconstrained_paths
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@ -156,6 +156,7 @@ record_sta_tests {
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report_json2
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suppress_msg
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verilog_attribute
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report_checks_sorted
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}
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define_test_group fast [group_tests all]
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@ -0,0 +1,87 @@
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Startpoint: r1 (rising edge-triggered flip-flop clocked by clk)
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Endpoint: r4 (rising edge-triggered flip-flop clocked by clk)
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Path Group: long
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Path Type: max
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Delay Time Description
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---------------------------------------------------------
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0.00 0.00 clock clk (rise edge)
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0.00 0.00 clock network delay (ideal)
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0.00 0.00 ^ r1/CLK (DFFHQx4_ASAP7_75t_R)
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64.76 64.76 ^ r1/Q (DFFHQx4_ASAP7_75t_R)
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17.77 82.53 ^ u2/Y (BUFx2_ASAP7_75t_R)
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17.88 100.42 ^ u3/Y (BUFx2_ASAP7_75t_R)
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16.66 117.08 ^ u4/Y (BUFx2_ASAP7_75t_R)
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0.00 117.08 ^ r4/D (DFFHQx4_ASAP7_75t_R)
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117.08 data arrival time
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500.00 500.00 clock clk (rise edge)
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0.00 500.00 clock network delay (ideal)
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0.00 500.00 clock reconvergence pessimism
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500.00 ^ r4/CLK (DFFHQx4_ASAP7_75t_R)
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-12.61 487.39 library setup time
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487.39 data required time
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---------------------------------------------------------
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487.39 data required time
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-117.08 data arrival time
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---------------------------------------------------------
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370.32 slack (MET)
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Startpoint: r1 (rising edge-triggered flip-flop clocked by clk)
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Endpoint: r3 (rising edge-triggered flip-flop clocked by clk)
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Path Group: custom
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Path Type: max
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Delay Time Description
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---------------------------------------------------------
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0.00 0.00 clock clk (rise edge)
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0.00 0.00 clock network delay (ideal)
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0.00 0.00 ^ r1/CLK (DFFHQx4_ASAP7_75t_R)
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64.76 64.76 ^ r1/Q (DFFHQx4_ASAP7_75t_R)
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17.77 82.53 ^ u2/Y (BUFx2_ASAP7_75t_R)
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17.88 100.42 ^ u3/Y (BUFx2_ASAP7_75t_R)
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0.00 100.42 ^ r3/D (DFFHQx4_ASAP7_75t_R)
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100.42 data arrival time
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500.00 500.00 clock clk (rise edge)
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0.00 500.00 clock network delay (ideal)
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0.00 500.00 clock reconvergence pessimism
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500.00 ^ r3/CLK (DFFHQx4_ASAP7_75t_R)
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-12.98 487.02 library setup time
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487.02 data required time
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---------------------------------------------------------
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487.02 data required time
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-100.42 data arrival time
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---------------------------------------------------------
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386.60 slack (MET)
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Startpoint: r1 (rising edge-triggered flip-flop clocked by clk)
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Endpoint: r2 (rising edge-triggered flip-flop clocked by clk)
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Path Group: clk
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Path Type: max
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Delay Time Description
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---------------------------------------------------------
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0.00 0.00 clock clk (rise edge)
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0.00 0.00 clock network delay (ideal)
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0.00 0.00 ^ r1/CLK (DFFHQx4_ASAP7_75t_R)
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64.76 64.76 ^ r1/Q (DFFHQx4_ASAP7_75t_R)
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17.77 82.53 ^ u2/Y (BUFx2_ASAP7_75t_R)
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0.00 82.53 ^ r2/D (DFFHQx4_ASAP7_75t_R)
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82.53 data arrival time
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500.00 500.00 clock clk (rise edge)
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0.00 500.00 clock network delay (ideal)
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0.00 500.00 clock reconvergence pessimism
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500.00 ^ r2/CLK (DFFHQx4_ASAP7_75t_R)
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-12.98 487.02 library setup time
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487.02 data required time
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---------------------------------------------------------
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487.02 data required time
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-82.53 data arrival time
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---------------------------------------------------------
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404.48 slack (MET)
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@ -0,0 +1,12 @@
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# report_checks with sorted path ends
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read_liberty asap7_small.lib.gz
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read_verilog report_checks_sorted.v
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link_design top
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create_clock -name clk -period 500 {clk}
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set_input_delay -clock clk 0 {in}
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group_path -name custom -to {r3}
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group_path -name long -to {r4}
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report_checks -group_path_count 1 -sort_by_slack
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@ -0,0 +1,15 @@
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module top (input in, input clk, output out);
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wire w1, w2, w3, w4;
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DFFHQx4_ASAP7_75t_R r1 (.D(in), .CLK(clk), .Q(w1));
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BUFx2_ASAP7_75t_R u2 (.A(w1), .Y(w2));
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BUFx2_ASAP7_75t_R u3 (.A(w2), .Y(w3));
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BUFx2_ASAP7_75t_R u4 (.A(w3), .Y(w4));
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DFFHQx4_ASAP7_75t_R r2 (.D(w2), .CLK(clk), .Q(out));
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DFFHQx4_ASAP7_75t_R r3 (.D(w3), .CLK(clk), .Q(out));
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DFFHQx4_ASAP7_75t_R r4 (.D(w4), .CLK(clk), .Q(out));
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endmodule
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