all_inputs -no_clocks

Signed-off-by: James Cherry <cherry@parallaxsw.com>

doc/ChangeLog.txt

@@ -24,6 +24,11 @@ timing groups.
   report_clock_skew -include_internal_latency
   report_clock_latency -include_internal_latency
 
+The all_inputs command now supports the -no_clocks argument to exclude
+clocks from the list.
+
+  all_inputs [-no_clocks]
+
 Release 2.4.0 2023/01/19
 -------------------------
 

include/sta/Sdc.hh

@@ -200,6 +200,8 @@ public:
   void deleteNetBefore(const Net *net);
 
   // SWIG sdc interface.
+  PortSeq allInputs(bool no_clks);
+  PortSeq allOutputs();
   AnalysisType analysisType() { return analysis_type_; }
   void setAnalysisType(AnalysisType analysis_type);
   void setOperatingConditions(OperatingConditions *op_cond,
@@ -1046,6 +1048,8 @@ public:
   bool bidirectDrvrSlewFromLoad(const Pin *pin) const;
 
 protected:
+  void portMembers(const Port *port,
+                   PortSeq &ports);
   void initVariables();
   void clearCycleAcctings();
   void removeLibertyAnnotations();

sdc/Sdc.cc

@@ -444,6 +444,57 @@ Sdc::isConstrained(const Net *net) const
 
 ////////////////////////////////////////////////////////////////
 
+PortSeq
+Sdc::allInputs(bool no_clks)
+{
+  PortSeq ports;
+  Instance *top_inst = network_->topInstance();
+  InstancePinIterator *pin_iter = network_->pinIterator(top_inst);
+  while (pin_iter->hasNext()) {
+    const Pin *pin = pin_iter->next();
+    const Port *port = network_->port(pin);
+    PortDirection *dir = network_->direction(port);
+    if (dir->isAnyInput()
+        && !(no_clks && isClock(pin)))
+      portMembers(port, ports);
+  }
+  delete pin_iter;
+  return ports;
+}
+
+PortSeq
+Sdc::allOutputs()
+{
+  PortSeq ports;
+  Instance *top_inst = network_->topInstance();
+  InstancePinIterator *pin_iter = network_->pinIterator(top_inst);
+  while (pin_iter->hasNext()) {
+    const Pin *pin = pin_iter->next();
+    const Port *port = network_->port(pin);
+    PortDirection *dir = network_->direction(port);
+    if (dir->isAnyOutput())
+      portMembers(port, ports);
+  }
+  delete pin_iter;
+  return ports;
+}
+
+void
+Sdc::portMembers(const Port *port,
+                 PortSeq &ports)
+{
+  if (network_->isBus(port)) {
+    PortMemberIterator *member_iter = network_->memberIterator(port);
+    while (member_iter->hasNext()) {
+      Port *member = member_iter->next();
+      ports.push_back(member);
+    }
+    delete member_iter;
+  }
+  else
+    ports.push_back(port);
+}
+
 void
 Sdc::setAnalysisType(AnalysisType analysis_type)
 {

tcl/Sdc.tcl

@@ -296,50 +296,21 @@ proc all_clocks { } {
 
 ################################################################
 
-define_cmd_args "all_inputs" {}
+define_cmd_args "all_inputs" {[-no_clocks]}
 
-proc all_inputs { } {
-  return [all_ports_for_direction "input"]
+proc all_inputs { args } {
+  parse_key_args "all_inputs" args keys {} flags {-no_clocks}
+  set no_clks [info exists flags(-no_clocks)]
+  return [all_inputs_cmd $no_clks]
 }
 
 ################################################################
 
 define_cmd_args "all_outputs" {}
 
-proc all_outputs { } {
-  return [all_ports_for_direction "output"]
-}
-
-proc all_ports_for_direction { direction } {
-  set top_instance [top_instance]
-  set top_cell [$top_instance cell]
-  set ports {}
-  set iter [$top_cell port_iterator]
-  while {[$iter has_next]} {
-    set port [$iter next]
-    set port_dir [port_direction $port]
-    if { $port_dir == $direction || $port_dir == "bidirect" } {
-      set ports [concat $ports [port_members $port]]
-    }
-  }
-  $iter finish
-  return $ports
-}
-
-proc port_members { port } {
-  if [$port is_bus] {
-    # Expand bus ports.
-    set ports {}
-    set member_iter [$port member_iterator]
-    while {[$member_iter has_next]} {
-      set bit_port [$member_iter next]
-      lappend ports $bit_port
-    }
-    $member_iter finish
-    return $ports
-  } else {
-    return $port
-  }
+proc all_outputs { args } {
+  check_argc_eq0 "all_outputs" $args
+  return [all_outputs_cmd]
 }
 
 ################################################################
@@ -2098,6 +2069,22 @@ proc parse_disable_inst_ports { inst port_name } {
   return $ports
 }
 
+proc port_members { port } {
+  if [$port is_bus] {
+    # Expand bus ports.
+    set ports {}
+    set member_iter [$port member_iterator]
+    while {[$member_iter has_next]} {
+      set bit_port [$member_iter next]
+      lappend ports $bit_port
+    }
+    $member_iter finish
+    return $ports
+  } else {
+    return $port
+  }
+}
+
 proc set_disable_timing_cell { cell from to } {
   set from_ports [parse_disable_cell_ports $cell $from]
   set to_ports [parse_disable_cell_ports $cell $to]

tcl/StaTcl.i

@@ -1108,6 +1108,22 @@ find_nets_hier_matching(const char *pattern,
   return matches;
 }
 
+PortSeq
+all_inputs_cmd(bool no_clocks)
+{
+  Sta *sta = Sta::sta();
+  cmdLinkedNetwork();
+  return sta->sdc()->allInputs(no_clocks);
+}
+
+PortSeq
+all_outputs_cmd()
+{
+  Sta *sta = Sta::sta();
+  cmdLinkedNetwork();
+  return sta->sdc()->allOutputs();
+}
+
 PortSeq
 filter_ports(const char *property,
 	     const char *op,