pocv early sigma used for late

This commit is contained in:
James Cherry 2019-12-20 17:23:48 -07:00
parent 169fe22825
commit 3502671d17
3 changed files with 6 additions and 6 deletions

View File

@ -34,7 +34,6 @@ ArcDelayCalc::model(TimingArc *arc,
const OperatingConditions *op_cond = dcalc_ap->operatingConditions();
TimingArc *corner_arc = arc->cornerArc(dcalc_ap->libertyIndex());
return corner_arc->model(op_cond);
}
GateTimingModel *

View File

@ -1207,14 +1207,15 @@ GraphDelayCalc1::findArcDelay(LibertyCell *drvr_cell,
RiseFall *drvr_rf = arc->toTrans()->asRiseFall();
if (from_rf && drvr_rf) {
DcalcAPIndex ap_index = dcalc_ap->index();
debugPrint6(debug_, "delay_calc", 3,
" %s %s -> %s %s (%s) %s\n",
debugPrint7(debug_, "delay_calc", 3,
" %s %s -> %s %s (%s) corner:%s/%s\n",
arc->from()->name(),
arc->fromTrans()->asString(),
arc->to()->name(),
arc->toTrans()->asString(),
arc->role()->asString(),
dcalc_ap->corner()->name());
dcalc_ap->corner()->name(),
dcalc_ap->delayMinMax()->asString());
// Delay calculation is done even when the gate delays/slews are
// annotated because the wire delays may not be annotated.
const Slew from_slew = edgeFromSlew(from_vertex, from_rf, edge, dcalc_ap);

View File

@ -100,7 +100,7 @@ GateTableModel::gateDelay(const LibertyCell *cell,
in_slew, load_cap, related_out_cap);
if (pocv_enabled && delay_sigma_models_[EarlyLate::lateIndex()])
sigma_late = findValue(library, cell, pvt,
delay_sigma_models_[EarlyLate::earlyIndex()],
delay_sigma_models_[EarlyLate::lateIndex()],
in_slew, load_cap, related_out_cap);
gate_delay = makeDelay(delay, sigma_early, sigma_late);
@ -112,7 +112,7 @@ GateTableModel::gateDelay(const LibertyCell *cell,
in_slew, load_cap, related_out_cap);
if (pocv_enabled && slew_sigma_models_[EarlyLate::lateIndex()])
sigma_late = findValue(library, cell, pvt,
slew_sigma_models_[EarlyLate::earlyIndex()],
slew_sigma_models_[EarlyLate::lateIndex()],
in_slew, load_cap, related_out_cap);
// Clip negative slews to zero.
if (slew < 0.0)