Search::pathClkPathArrival use ClkInfo:::crprClkPath
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0eea513a90
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@ -2258,16 +2258,18 @@ Search::clkPathArrival(const Path *clk_path,
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Arrival
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Arrival
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Search::pathClkPathArrival(const Path *path) const
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Search::pathClkPathArrival(const Path *path) const
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{
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{
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PathRef src_clk_path;
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// Use crpr clk path to find the clock arrival at the source register.
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pathClkPathArrival1(path, src_clk_path);
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ClkInfo *clk_info = path->clkInfo(this);
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if (!src_clk_path.isNull())
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if (clk_info->isPropagated()) {
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return clkPathArrival(&src_clk_path);
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PathVertexRep &crpr_clk_path = clk_info->crprClkPath();
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else {
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if (!crpr_clk_path.isNull()) {
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// Check for input arrival clock.
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return crpr_clk_path.arrival(this);
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ClockEdge *clk_edge = path->clkEdge(this);
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}
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if (clk_edge)
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return clk_edge->time();
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}
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}
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// Check for input arrival clock.
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ClockEdge *clk_edge = path->clkEdge(this);
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if (clk_edge)
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return clk_edge->time();
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return 0.0;
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return 0.0;
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}
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}
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@ -2450,7 +2452,6 @@ Search::thruClkInfo(PathVertex *from_path,
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// the clkinfo.
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// the clkinfo.
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const Pin *gen_clk_src = nullptr;
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const Pin *gen_clk_src = nullptr;
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if (from_clk_info->isGenClkSrcPath()
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if (from_clk_info->isGenClkSrcPath()
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&& sdc_->crprActive()
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&& sdc_->isClock(to_pin)) {
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&& sdc_->isClock(to_pin)) {
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// Don't care that it could be a regular clock root.
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// Don't care that it could be a regular clock root.
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gen_clk_src = to_pin;
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gen_clk_src = to_pin;
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@ -2458,8 +2459,7 @@ Search::thruClkInfo(PathVertex *from_path,
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}
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}
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PathVertex *to_crpr_clk_path = nullptr;
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PathVertex *to_crpr_clk_path = nullptr;
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if (sdc_->crprActive()
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if (to_vertex->isRegClk()) {
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&& to_vertex->isRegClk()) {
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to_crpr_clk_path = from_path;
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to_crpr_clk_path = from_path;
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changed = true;
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changed = true;
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}
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}
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