parallel dcalc with diff arc counts resolves #288

Signed-off-by: James Cherry <cherry@parallaxsw.com>
This commit is contained in:
James Cherry 2025-09-06 14:43:01 -07:00
parent 433f9aa7d7
commit 2163a5c6b9
4 changed files with 15 additions and 5 deletions

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@ -39,6 +39,7 @@ project(STA VERSION 2.7.0
option(CUDD_DIR "CUDD BDD package directory") option(CUDD_DIR "CUDD BDD package directory")
option(USE_TCL_READLINE "Use TCL readline package" ON) option(USE_TCL_READLINE "Use TCL readline package" ON)
option(ENABLE_TSAN "Compile with thread santizer enabled" OFF) option(ENABLE_TSAN "Compile with thread santizer enabled" OFF)
option(ENABLE_ASAN "Compile with address santizer enabled" OFF)
# Turn on to debug compiler args. # Turn on to debug compiler args.
set(CMAKE_VERBOSE_MAKEFILE OFF) set(CMAKE_VERBOSE_MAKEFILE OFF)
@ -541,6 +542,12 @@ if(ENABLE_TSAN)
set(CMAKE_EXE_LINKER_FLAGS "-fsanitize=thread") set(CMAKE_EXE_LINKER_FLAGS "-fsanitize=thread")
endif() endif()
if(ENABLE_ASAN)
message(STATUS "Address sanitizer: ${ENABLE_ASAN}")
set(CXX_FLAGS "${CXX_FLAGS};-fsanitize=address")
set(CMAKE_EXE_LINKER_FLAGS "-fsanitize=address")
endif()
target_compile_options(OpenSTA target_compile_options(OpenSTA
PRIVATE PRIVATE
$<$<CXX_COMPILER_ID:GNU>:${CXX_FLAGS}> $<$<CXX_COMPILER_ID:GNU>:${CXX_FLAGS}>

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@ -1012,7 +1012,7 @@ GraphDelayCalc::makeArcDcalcArgs(Vertex *drvr_vertex,
arc1 = arc; arc1 = arc;
} }
else else
findParallelEdge(drvr_vertex1, edge, arc, edge1, arc1); findParallelEdge(drvr_vertex1, arc, edge1, arc1);
// Shockingly one fpga vendor connects outputs with no timing arcs together. // Shockingly one fpga vendor connects outputs with no timing arcs together.
if (edge1) { if (edge1) {
Vertex *from_vertex = edge1->from(graph_); Vertex *from_vertex = edge1->from(graph_);
@ -1036,7 +1036,6 @@ GraphDelayCalc::makeArcDcalcArgs(Vertex *drvr_vertex,
// primary driver drvr_edge/drvr_arc. // primary driver drvr_edge/drvr_arc.
void void
GraphDelayCalc::findParallelEdge(Vertex *vertex, GraphDelayCalc::findParallelEdge(Vertex *vertex,
Edge *drvr_edge,
const TimingArc *drvr_arc, const TimingArc *drvr_arc,
// Return values. // Return values.
Edge *&edge, Edge *&edge,
@ -1047,11 +1046,10 @@ GraphDelayCalc::findParallelEdge(Vertex *vertex,
if (vertex_cell == drvr_cell) { if (vertex_cell == drvr_cell) {
// Homogeneous drivers. // Homogeneous drivers.
arc = drvr_arc; arc = drvr_arc;
LibertyPort *from_port = network_->libertyPort(drvr_edge->from(graph_)->pin());
VertexInEdgeIterator edge_iter(vertex, graph_); VertexInEdgeIterator edge_iter(vertex, graph_);
while (edge_iter.hasNext()) { while (edge_iter.hasNext()) {
edge = edge_iter.next(); edge = edge_iter.next();
if (network_->libertyPort(edge->from(graph_)->pin()) == from_port) if (edge->timingArcSet() == arc->set())
return; return;
} }
} }

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@ -35,6 +35,7 @@
#include "PortDirection.hh" #include "PortDirection.hh"
#include "Network.hh" #include "Network.hh"
#include "DcalcAnalysisPt.hh" #include "DcalcAnalysisPt.hh"
#include "FuncExpr.hh"
namespace sta { namespace sta {
@ -1293,6 +1294,11 @@ Edge::to_string(const StaState *sta) const
string str = from(graph)->to_string(sta); string str = from(graph)->to_string(sta);
str += " -> "; str += " -> ";
str += to(graph)->to_string(sta); str += to(graph)->to_string(sta);
FuncExpr *when = arc_set_->cond();
if (when) {
str += " ";
str += when->to_string();
}
return str; return str;
} }

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@ -204,7 +204,6 @@ protected:
const DcalcAnalysisPt *dcalc_ap, const DcalcAnalysisPt *dcalc_ap,
ArcDelayCalc *arc_delay_calc); ArcDelayCalc *arc_delay_calc);
void findParallelEdge(Vertex *vertex, void findParallelEdge(Vertex *vertex,
Edge *drvr_edge,
const TimingArc *drvr_arc, const TimingArc *drvr_arc,
// Return values. // Return values.
Edge *&edge, Edge *&edge,