Merge remote-tracking branch 'upstream/master'

Signed-off-by: Matt Liberty <mliberty@precisioninno.com>
This commit is contained in:
Matt Liberty 2024-05-08 16:48:48 -07:00
commit 1f9adb4b96
5 changed files with 65 additions and 62 deletions

View File

@ -110,7 +110,6 @@ public:
virtual float sourceClkOffset(const StaState *sta) const = 0;
virtual Delay sourceClkLatency(const StaState *sta) const;
virtual Delay sourceClkInsertionDelay(const StaState *sta) const;
virtual Delay sourceClkDelay(const StaState *sta) const;
virtual PathVertex *targetClkPath();
virtual const PathVertex *targetClkPath() const;
virtual const Clock *targetClk(const StaState *sta) const;
@ -188,10 +187,6 @@ public:
protected:
PathEnd(Path *path);
void clkPath(PathVertex *path,
const StaState *sta,
// Return value.
PathVertex &clk_path);
static float checkNonInterClkUncertainty(const PathVertex *tgt_clk_path,
const ClockEdge *tgt_clk_edge,
const TimingRole *check_role,
@ -327,7 +322,6 @@ public:
virtual TimingArc *checkArc() const { return check_arc_; }
virtual int exceptPathCmp(const PathEnd *path_end,
const StaState *sta) const;
virtual Delay sourceClkDelay(const StaState *sta) const;
virtual Delay clkSkew(const StaState *sta);
protected:
@ -338,6 +332,7 @@ protected:
MultiCyclePath *mcp,
Crpr crpr,
bool crpr_valid);
Delay sourceClkDelay(const StaState *sta) const;
TimingArc *check_arc_;
Edge *check_edge_;
@ -517,6 +512,10 @@ protected:
MultiCyclePath *mcp,
Crpr crpr,
bool crpr_valid);
void clkPath(PathVertex *path,
const StaState *sta,
// Return value.
PathVertex &clk_path);
Arrival requiredTimeNoCrpr(const StaState *sta) const;
// setup uses zero cycle default
virtual int setupDefaultCycles() const { return 0; }

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@ -156,12 +156,6 @@ PathEnd::sourceClkInsertionDelay(const StaState *) const
return delay_zero;
}
Delay
PathEnd::sourceClkDelay(const StaState *) const
{
return delay_zero;
}
const Clock *
PathEnd::targetClk(const StaState *) const
{
@ -290,45 +284,6 @@ PathEnd::exceptPathCmp(const PathEnd *path_end,
return 1;
}
// PathExpanded::expand() and PathExpanded::clkPath().
// Similar to srcClkPath but for PathVertex's.
void
PathEnd::clkPath(PathVertex *path,
const StaState *sta,
// Return value.
PathVertex &clk_path)
{
PathVertex p(path);
while (!p.isNull()) {
PathVertex prev_path;
TimingArc *prev_arc;
p.prevPath(sta, prev_path, prev_arc);
if (p.isClock(sta)) {
clk_path = p;
return;
}
if (prev_arc) {
TimingRole *prev_role = prev_arc->role();
if (prev_role == TimingRole::regClkToQ()
|| prev_role == TimingRole::latchEnToQ()) {
p.prevPath(sta, prev_path, prev_arc);
clk_path = prev_path;
return;
}
else if (prev_role == TimingRole::latchDtoQ()) {
const Latches *latches = sta->latches();
Edge *prev_edge = p.prevEdge(prev_arc, sta);
PathVertex enable_path;
latches->latchEnablePath(&p, prev_edge, enable_path);
clk_path = enable_path;
return;
}
}
p = prev_path;
}
}
////////////////////////////////////////////////////////////////
Delay
@ -1059,12 +1014,21 @@ PathEndCheck::exceptPathCmp(const PathEnd *path_end,
return cmp;
}
Delay
PathEndCheck::clkSkew(const StaState *sta)
{
commonClkPessimism(sta);
return sourceClkDelay(sta) - targetClkDelay(sta) - crpr_;
}
Delay
PathEndCheck::sourceClkDelay(const StaState *sta) const
{
ClkInfo *src_clk_info = path_.tag(sta)->clkInfo();
const PathVertex src_clk_path(src_clk_info->crprClkPath(), sta);
PathExpanded expanded(&path_, sta);
PathRef src_clk_path;
expanded.clkPath(src_clk_path);
if (!src_clk_path.isNull()) {
ClkInfo *src_clk_info = path_.tag(sta)->clkInfo();
if (src_clk_info->isPropagated()) {
// Propagated clock. Propagated arrival is seeded with insertion delay.
Arrival clk_arrival = src_clk_path.arrival(sta);
@ -1080,13 +1044,6 @@ PathEndCheck::sourceClkDelay(const StaState *sta) const
return 0.0;
}
Delay
PathEndCheck::clkSkew(const StaState *sta)
{
commonClkPessimism(sta);
return sourceClkDelay(sta) - targetClkDelay(sta) - crpr_;
}
////////////////////////////////////////////////////////////////
PathEndLatchCheck::PathEndLatchCheck(Path *path,
@ -1610,6 +1567,45 @@ PathEndDataCheck::PathEndDataCheck(DataCheck *check,
clkPath(data_clk_path, sta, clk_path_);
}
// PathExpanded::expand() and PathExpanded::clkPath().
void
PathEndDataCheck::clkPath(PathVertex *path,
const StaState *sta,
// Return value.
PathVertex &clk_path)
{
PathVertex p(path);
while (!p.isNull()) {
PathVertex prev_path;
TimingArc *prev_arc;
p.prevPath(sta, prev_path, prev_arc);
if (p.isClock(sta)) {
clk_path = p;
return;
}
if (prev_arc) {
TimingRole *prev_role = prev_arc->role();
if (prev_role == TimingRole::regClkToQ()
|| prev_role == TimingRole::latchEnToQ()) {
p.prevPath(sta, prev_path, prev_arc);
clk_path = prev_path;
return;
}
else if (prev_role == TimingRole::latchDtoQ()) {
const Latches *latches = sta->latches();
Edge *prev_edge = p.prevEdge(prev_arc, sta);
PathVertex enable_path;
latches->latchEnablePath(&p, prev_edge, enable_path);
clk_path = enable_path;
return;
}
}
p = prev_path;
}
}
PathEndDataCheck::PathEndDataCheck(DataCheck *check,
Path *data_path,
PathVertex *data_clk_path,

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@ -69,7 +69,7 @@ proc show_cmd_args { cmd } {
}
set arglist $rest
} else {
report_line $line
report_line "$line $arglist"
break
}
}

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@ -396,7 +396,7 @@ define_cmd_args "report_checks" \
[-sort_by_slack]\
[-path_group group_name]\
[-format full|full_clock|full_clock_expanded|short|end|summary]\
[-fields [capacitance|slew|input_pin|net]]\
[-fields capacitance|slew|input_pin|net]\
[-digits digits]\
[-no_line_splits]\
[> filename] [>> filename]}

View File

@ -1227,6 +1227,10 @@ using namespace sta;
Tcl_SetObjResult(interp, obj);
}
%typemap(out) Delay {
Tcl_SetObjResult(interp,Tcl_NewDoubleObj(delayAsFloat($1)));
}
%typemap(out) Arrival {
Tcl_SetObjResult(interp,Tcl_NewDoubleObj(delayAsFloat($1)));
}
@ -1247,6 +1251,10 @@ using namespace sta;
Tcl_SetObjResult(interp,Tcl_NewDoubleObj(delayAsFloat($1)));
}
%typemap(out) Crpr {
Tcl_SetObjResult(interp,Tcl_NewDoubleObj(delayAsFloat($1)));
}
%typemap(in) PathGroupNameSet* {
$1 = tclListSetConstChar($input, interp);
}