luke
/
OpenSTA
mirror of https://github.com/The-OpenROAD-Project/OpenSTA.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

test functionality with dollar sign, also need regoldening an openroad regression with another commit 

Signed-off-by: dsengupta0628 <dsengupta@precisioninno.com>
This commit is contained in:
dsengupta0628 2026-02-17 20:19:17 +00:00
parent 18ce25112d
commit 1c1bef30d5
2 changed files with 2 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
test/test_write_verilog_escape.ok
View File

@ -13,5 +13,6 @@ module hier_block (childclk,
output [1:0] \Y[2:1] ; output [1:0] \Y[2:1] ;
BUFx2_ASAP7_75t_R \abuf_$100 (.A(childclk));
BUFx2_ASAP7_75t_R \ff0/name (.A(childclk)); BUFx2_ASAP7_75t_R \ff0/name (.A(childclk));
endmodule endmodule

1
test/test_write_verilog_escape.v
View File

@ -9,6 +9,7 @@ module \hier_block (childclk, \Y[2:1] );
input childclk; input childclk;
output [1:0] \Y[2:1] ; output [1:0] \Y[2:1] ;
wire [1:0] \Y[2:1] ; wire [1:0] \Y[2:1] ;
BUFx2_ASAP7_75t_R \abuf_$100 (.A(childclk));
BUFx2_ASAP7_75t_R \ff0/name (.A(childclk)); BUFx2_ASAP7_75t_R \ff0/name (.A(childclk));
endmodule // hier_block1 endmodule // hier_block1