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recerse bbffa9b4 a976bbac for performance issues 

Signed-off-by: James Cherry <cherry@parallaxsw.com>
This commit is contained in:
James Cherry 2025-01-28 08:56:40 -07:00
parent 4e5ab7ca26
commit 1c0c6e06f3
2 changed files with 10 additions and 10 deletions
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3
include/sta/Search.hh
View File

@ -261,10 +261,9 @@ public:
const PathAnalysisPt *path_ap);
ClkInfo *thruClkInfo(PathVertex *from_path,
ClkInfo *from_clk_info,
bool from_is_clk,
Edge *edge,
Vertex *to_vertex,
const Pin *to_pin,
bool to_is_clk,
const MinMax *min_max,
const PathAnalysisPt *path_ap);
ClkInfo *clkInfoWithCrprClkPath(ClkInfo *from_clk_info,

13
search/Search.cc
View File

@ -2170,7 +2170,9 @@ PathVisitor::visitFromPath(const Pin *from_pin,
// passed thru reg/latch D->Q edges.
&& from_tag->isClock())) {
const RiseFall *clk_rf = clk_edge ? clk_edge->transition() : nullptr;
ClkInfo *to_clk_info = search_->clkInfoWithCrprClkPath(from_clk_info,
ClkInfo *to_clk_info = from_clk_info;
if (network_->direction(to_pin)->isInternal())
to_clk_info = search_->clkInfoWithCrprClkPath(from_clk_info,
from_path, path_ap);
to_tag = search_->fromRegClkTag(from_pin, from_rf, clk, clk_rf,
to_clk_info, to_pin, to_rf, min_max,
@ -2425,8 +2427,8 @@ Search::thruClkTag(PathVertex *from_path,
&& to_propagates_clk
&& (role->isWire()
|| role == TimingRole::combinational()));
ClkInfo *to_clk_info = thruClkInfo(from_path, from_clk_info, from_is_clk,
edge, to_pin, to_is_clk,
ClkInfo *to_clk_info = thruClkInfo(from_path, from_clk_info,
edge, to_vertex, to_pin,
min_max, path_ap);
Tag *to_tag = mutateTag(from_tag,from_pin,from_rf,from_is_clk,from_clk_info,
to_pin, to_rf, to_is_clk, to_is_reg_clk, false,
@ -2438,10 +2440,9 @@ Search::thruClkTag(PathVertex *from_path,
ClkInfo *
Search::thruClkInfo(PathVertex *from_path,
ClkInfo *from_clk_info,
bool from_is_clk,
Edge *edge,
Vertex *to_vertex,
const Pin *to_pin,
bool to_is_clk,
const MinMax *min_max,
const PathAnalysisPt *path_ap)
{
@ -2472,7 +2473,7 @@ Search::thruClkInfo(PathVertex *from_path,
PathVertex *to_crpr_clk_path = nullptr;
if (sdc_->crprActive()
&& from_is_clk && !to_is_clk) {
&& to_vertex->isRegClk()) {
to_crpr_clk_path = from_path;
changed = true;
}