StaState::crprEnabled

Signed-off-by: James Cherry <cherry@parallaxsw.com>
This commit is contained in:
James Cherry 2025-04-10 14:16:00 -07:00
parent efee9ec7e4
commit 109bc9ab5e
8 changed files with 16 additions and 17 deletions

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@ -130,10 +130,10 @@ protected:
Search *search_; Search *search_;
Latches *latches_; Latches *latches_;
ClkNetwork *clk_network_; ClkNetwork *clk_network_;
Variables *variables_;
int thread_count_; int thread_count_;
DispatchQueue *dispatch_queue_; DispatchQueue *dispatch_queue_;
float sigma_factor_; float sigma_factor_;
Variables *variables_;
}; };
} // namespace } // namespace

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@ -217,7 +217,7 @@ clkInfoEqual(const ClkInfo *clk_info1,
const ClkInfo *clk_info2, const ClkInfo *clk_info2,
const StaState *sta) const StaState *sta)
{ {
bool crpr_on = sta->sdc()->crprActive(); bool crpr_on = sta->crprActive();
ClockUncertainties *uncertainties1 = clk_info1->uncertainties(); ClockUncertainties *uncertainties1 = clk_info1->uncertainties();
ClockUncertainties *uncertainties2 = clk_info2->uncertainties(); ClockUncertainties *uncertainties2 = clk_info2->uncertainties();
return clk_info1->clkEdge() == clk_info2->clkEdge() return clk_info1->clkEdge() == clk_info2->clkEdge()
@ -290,7 +290,7 @@ clkInfoCmp(const ClkInfo *clk_info1,
if (gen_clk_src1 > gen_clk_src2) if (gen_clk_src1 > gen_clk_src2)
return 1; return 1;
bool crpr_on = sta->sdc()->crprActive(); bool crpr_on = sta->crprActive();
if (crpr_on) { if (crpr_on) {
const Path *crpr_path1 = clk_info1->crprClkPath(sta); const Path *crpr_path1 = clk_info1->crprClkPath(sta);
const Path *crpr_path2 = clk_info2->crprClkPath(sta); const Path *crpr_path2 = clk_info2->crprClkPath(sta);

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@ -108,7 +108,7 @@ CheckCrpr::checkCrpr(const Path *src_path,
{ {
crpr = 0.0; crpr = 0.0;
crpr_pin = nullptr; crpr_pin = nullptr;
if (sdc_->crprActive() if (crprActive()
&& src_path && tgt_clk_path) { && src_path && tgt_clk_path) {
bool same_pin = (variables_->crprMode() == CrprMode::same_pin); bool same_pin = (variables_->crprMode() == CrprMode::same_pin);
checkCrpr1(src_path, tgt_clk_path, same_pin, crpr, crpr_pin); checkCrpr1(src_path, tgt_clk_path, same_pin, crpr, crpr_pin);
@ -330,7 +330,7 @@ CheckCrpr::outputDelayCrpr(const Path *src_path,
{ {
crpr = 0.0; crpr = 0.0;
crpr_pin = nullptr; crpr_pin = nullptr;
if (sdc_->crprActive()) { if (crprActive()) {
const PathAnalysisPt *path_ap = src_path->pathAnalysisPt(this); const PathAnalysisPt *path_ap = src_path->pathAnalysisPt(this);
const PathAnalysisPt *tgt_path_ap = path_ap->tgtClkAnalysisPt(); const PathAnalysisPt *tgt_path_ap = path_ap->tgtClkAnalysisPt();
bool same_pin = (variables_->crprMode() == CrprMode::same_pin); bool same_pin = (variables_->crprMode() == CrprMode::same_pin);

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@ -352,8 +352,7 @@ Latches::latchOutArrival(const Path *data_path,
q_arrival = adjusted_data_arrival + arc_delay; q_arrival = adjusted_data_arrival + arc_delay;
// Tag switcheroo - data passing thru gets latch enable tag. // Tag switcheroo - data passing thru gets latch enable tag.
// States and path ap come from Q, everything else from enable. // States and path ap come from Q, everything else from enable.
Path *crpr_clk_path = Path *crpr_clk_path = crprActive() ? enable_path : nullptr;
sdc_->crprActive() ? enable_path : nullptr;
ClkInfo *q_clk_info = ClkInfo *q_clk_info =
search_->findClkInfo(en_clk_edge, search_->findClkInfo(en_clk_edge,
en_clk_info->clkSrc(), en_clk_info->clkSrc(),

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@ -295,7 +295,7 @@ PathEnumFaninVisitor::PathEnumFaninVisitor(PathEnd *path_end,
before_div_ap_index_(before_div_->pathAnalysisPtIndex(this)), before_div_ap_index_(before_div_->pathAnalysisPtIndex(this)),
before_div_arrival_(before_div_->arrival()), before_div_arrival_(before_div_->arrival()),
path_enum_(path_enum), path_enum_(path_enum),
crpr_active_(sdc_->crprActive()) crpr_active_(crprActive())
{ {
} }
@ -605,7 +605,7 @@ PathEnum::updatePathHeadDelays(PathSeq &paths,
prev_arrival = arrival; prev_arrival = arrival;
const Tag *tag = path->tag(this); const Tag *tag = path->tag(this);
const ClkInfo *clk_info = tag->clkInfo(); const ClkInfo *clk_info = tag->clkInfo();
if (sdc_->crprActive() if (crprActive()
&& clk_info != prev_clk_info && clk_info != prev_clk_info
// D->Q paths use the EN->Q clk info so no need to update. // D->Q paths use the EN->Q clk info so no need to update.
&& arc->role() != TimingRole::latchDtoQ()) { && arc->role() != TimingRole::latchDtoQ()) {

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@ -1112,7 +1112,7 @@ ArrivalVisitor::init(bool always_to_endpoints,
{ {
always_to_endpoints_ = always_to_endpoints; always_to_endpoints_ = always_to_endpoints;
pred_ = pred; pred_ = pred;
crpr_active_ = sdc_->crprActive(); crpr_active_ = crprActive();
} }
@ -2390,7 +2390,7 @@ Search::clkInfoWithCrprClkPath(ClkInfo *from_clk_info,
Path *from_path, Path *from_path,
const PathAnalysisPt *path_ap) const PathAnalysisPt *path_ap)
{ {
if (sdc_->crprActive()) if (crprActive())
return findClkInfo(from_clk_info->clkEdge(), return findClkInfo(from_clk_info->clkEdge(),
from_clk_info->clkSrc(), from_clk_info->clkSrc(),
from_clk_info->isPropagated(), from_clk_info->isPropagated(),
@ -2491,7 +2491,7 @@ Search::thruClkInfo(Path *from_path,
// the clkinfo. // the clkinfo.
const Pin *gen_clk_src = nullptr; const Pin *gen_clk_src = nullptr;
if (from_clk_info->isGenClkSrcPath() if (from_clk_info->isGenClkSrcPath()
&& sdc_->crprActive() && crprActive()
&& sdc_->isClock(to_pin)) { && sdc_->isClock(to_pin)) {
// Don't care that it could be a regular clock root. // Don't care that it could be a regular clock root.
gen_clk_src = to_pin; gen_clk_src = to_pin;
@ -2499,7 +2499,7 @@ Search::thruClkInfo(Path *from_path,
} }
Path *to_crpr_clk_path = nullptr; Path *to_crpr_clk_path = nullptr;
if (sdc_->crprActive() if (crprActive()
// Update crpr clk path for combinational paths leaving the clock // Update crpr clk path for combinational paths leaving the clock
// network (ie, tristate en->out) and buffer driving reg clk. // network (ie, tristate en->out) and buffer driving reg clk.
&& ((from_is_clk && ((from_is_clk

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@ -52,10 +52,10 @@ StaState::StaState() :
search_(nullptr), search_(nullptr),
latches_(nullptr), latches_(nullptr),
clk_network_(nullptr), clk_network_(nullptr),
variables_(nullptr),
thread_count_(1), thread_count_(1),
dispatch_queue_(nullptr), dispatch_queue_(nullptr),
sigma_factor_(1.0), sigma_factor_(1.0)
variables_(nullptr)
{ {
} }

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@ -418,7 +418,7 @@ tagMatch(const Tag *tag1,
&& tag1->isSegmentStart() == tag2->isSegmentStart() && tag1->isSegmentStart() == tag2->isSegmentStart()
&& clk_info1->isGenClkSrcPath() == clk_info2->isGenClkSrcPath() && clk_info1->isGenClkSrcPath() == clk_info2->isGenClkSrcPath()
&& (!match_crpr_clk_pin && (!match_crpr_clk_pin
|| !sta->sdc()->crprActive() || !sta->crprActive()
|| clk_info1->crprClkVertexId(sta) == clk_info2->crprClkVertexId(sta)) || clk_info1->crprClkVertexId(sta) == clk_info2->crprClkVertexId(sta))
&& tagStateEqual(tag1, tag2)); && tagStateEqual(tag1, tag2));
} }
@ -479,7 +479,7 @@ tagMatchCmp(const Tag *tag1,
return 1; return 1;
if (match_crpr_clk_pin if (match_crpr_clk_pin
&& sta->sdc()->crprActive()) { && sta->crprActive()) {
VertexId crpr_vertex1 = clk_info1->crprClkVertexId(sta); VertexId crpr_vertex1 = clk_info1->crprClkVertexId(sta);
VertexId crpr_vertex2 = clk_info2->crprClkVertexId(sta); VertexId crpr_vertex2 = clk_info2->crprClkVertexId(sta);
if (crpr_vertex1 < crpr_vertex2) if (crpr_vertex1 < crpr_vertex2)