ClkNetwork

include/sta/ClkNetwork.hh

@@ -0,0 +1,67 @@
+// OpenSTA, Static Timing Analyzer
+// Copyright (c) 2020, Parallax Software, Inc.
+// 
+// This program is free software: you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation, either version 3 of the License, or
+// (at your option) any later version.
+// 
+// This program is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+// 
+// You should have received a copy of the GNU General Public License
+// along with this program.  If not, see <https://www.gnu.org/licenses/>.
+
+#pragma once
+
+#include "Map.hh"
+#include "Set.hh"
+#include "StaState.hh"
+#include "NetworkClass.hh"
+#include "GraphClass.hh"
+#include "SdcClass.hh"
+
+namespace sta {
+
+typedef Map<const Pin*, ClockSet> PinClksMap;
+typedef Map<const Clock *, PinSet> ClkPinsMap;
+
+class Sta;
+
+// Find clock network pins.
+// This is not as reliable as Search::isClock but is much cheaper.
+class ClkNetwork : public StaState
+{
+public:
+  ClkNetwork(StaState *sta);
+  void ensureClkNetwork();
+  void clear();
+  bool isClock(const Pin *pin) const;
+  bool isIdealClock(const Pin *pin) const;
+  const ClockSet *clocks(const Pin *pin);
+  const ClockSet *idealClocks(const Pin *pin);
+  void clkPinsInvalid();
+
+protected:
+  void deletePinBefore(const Pin *pin);
+  void connectPinAfter(const Pin *pin);
+  void disconnectPinBefore(const Pin *pin);
+  friend class Sta;
+
+private:
+  void findClkPins();
+  void findClkPins(bool ideal_only,
+		   PinClksMap &clk_pin_map);
+
+  bool clk_pins_valid_;
+  // pin -> clks
+  PinClksMap pin_clks_map_;
+  // pin -> ideal clks
+  PinClksMap pin_ideal_clks_map_;
+  // clock -> pins
+  ClkPinsMap clk_pins_map_;
+};
+
+} // namespace

include/sta/Sta.hh

@@ -1145,12 +1145,14 @@ public:
 
   ////////////////////////////////////////////////////////////////
 
-  void ensureClkPins();
-  bool isIdealClock(Pin *pin) const;
+  void ensureClkNetwork();
+  // Assumes ensureClkNetwork() has been called.
   bool isClock(Pin *pin) const;
+  // Assumes ensureClkNetwork() has been called.
+  bool isIdealClock(Pin *pin) const;
   void clkPinsInvalid();
 
-////////////////////////////////////////////////////////////////
+  ////////////////////////////////////////////////////////////////
 
   void setTclInterp(Tcl_Interp *interp);
   Tcl_Interp *tclInterp();
@@ -1235,7 +1237,8 @@ protected:
   virtual void makeGraphDelayCalc();
   virtual void makeSim();
   virtual void makeSearch();
-  virtual void makeLatches();
+  virtual void makeLatches(); 
+  virtual void makeClkNetwork();
   virtual void makeCheckTiming();
   virtual void makeCheckSlewLimits();
   virtual void makeCheckFanoutLimits();
@@ -1330,11 +1333,6 @@ protected:
   void replaceCell(Instance *inst,
 		   Cell *to_cell,
 		   LibertyCell *to_lib_cell);
-  void clkPinsConnectPinAfter(Vertex *vertex);
-  void clkPinsDisconnectPinBefore(Vertex *vertex);
-  void findClkPins();
-  void findClkPins(bool ideal_only,
-		   PinSet &clk_pins);
   void sdcChangedGraph();
   void ensureGraphSdcAnnotated();
 
@@ -1356,10 +1354,6 @@ protected:
   bool update_genclks_;
   EquivCells *equiv_cells_;
   bool graph_sdc_annotated_;
-  // findClkPins
-  PinSet clk_pins_;
-  PinSet ideal_clk_pins_;
-  bool clk_pins_valid_;
 
   // Singleton sta used by tcl command interpreter.
   static Sta *sta_;

include/sta/StaState.hh

@@ -36,6 +36,7 @@ class Parasitics;
 class ArcDelayCalc;
 class GraphDelayCalc;
 class Latches;
+class ClkNetwork;
 class DispatchQueue;
 
 // Most STA components use functionality in other components.
@@ -114,6 +115,7 @@ protected:
   Sim *sim_;
   Search *search_;
   Latches *latches_;
+  ClkNetwork *clk_network_;
   int thread_count_;
   DispatchQueue *dispatch_queue_;
   bool pocv_enabled_;