mirror of
https://github.com/The-OpenROAD-Project/OpenSTA.git
synced 2026-08-30 09:48:30 +02:00
Merge remote-tracking branch 'parallax/master'
Signed-off-by: Matt Liberty <[email protected]>
This commit is contained in:
+14
-2
@@ -11,7 +11,7 @@ RUN sed -i s/mirror.centos.org/vault.centos.org/g /etc/yum.repos.d/*.repo \
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RUN sed -i s/mirror.centos.org/vault.centos.org/g /etc/yum.repos.d/*.repo \
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&& sed -i s/^#.*baseurl=http/baseurl=http/g /etc/yum.repos.d/*.repo \
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&& sed -i s/^mirrorlist=http/#mirrorlist=http/g /etc/yum.repos.d/*.repo \
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&& yum install -y devtoolset-11 wget cmake3 make eigen3-devel tcl-devel swig3 flex zlib-devel valgrind \
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&& yum install -y devtoolset-11 wget cmake3 make eigen3-devel tcl swig3 flex zlib-devel valgrind \
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&& yum clean -y all
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# Download Bison
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@@ -39,6 +39,18 @@ RUN source /opt/rh/devtoolset-11/enable && \
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make -j`nproc` && \
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make install
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# Download TCL
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RUN wget http://prdownloads.sourceforge.net/tcl/tcl8.6.16-src.tar.gz && \
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tar -xvf tcl8.6.16-src.tar.gz && \
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rm tcl8.6.16-src.tar.gz
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# Build TCL
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RUN source /opt/rh/devtoolset-11/enable && \
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cd tcl8.6.16 && \
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./unix/configure && \
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make -j`nproc` && \
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make install
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FROM base-dependencies AS builder
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COPY . /OpenSTA
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@@ -52,4 +64,4 @@ RUN source /opt/rh/devtoolset-11/enable && \
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make -j`nproc`
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# Run sta on entry
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ENTRYPOINT ["OpenSTA/app/sta"]
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ENTRYPOINT ["/OpenSTA/app/sta"]
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@@ -147,7 +147,8 @@ public:
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int to_index);
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VerilogModule *module(Cell *cell);
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Instance *linkNetwork(const char *top_cell_name,
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bool make_black_boxes);
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bool make_black_boxes,
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bool delete_modules);
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const char *filename() const { return filename_.c_str(); }
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void incrLine();
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Report *report() const { return report_; }
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@@ -321,6 +321,32 @@ Power::powerInside(const Instance *hinst,
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delete child_iter;
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}
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typedef std::pair<Instance*, float> InstPower;
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InstanceSeq
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Power::highestPowerInstances(size_t count,
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const Corner *corner)
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{
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vector<InstPower> inst_pwrs;
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LeafInstanceIterator *inst_iter = network_->leafInstanceIterator();
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while (inst_iter->hasNext()) {
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Instance *inst = inst_iter->next();
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PowerResult pwr = power(inst, corner);
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inst_pwrs.push_back({inst, pwr.total()});
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}
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delete inst_iter;
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sort(inst_pwrs.begin(), inst_pwrs.end(), [](InstPower &inst_pwr1,
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InstPower &inst_pwr2) {
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return inst_pwr1.second > inst_pwr2.second;
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});
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InstanceSeq insts;
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for (size_t i = 0; i < count; i++)
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insts.push_back(inst_pwrs[i].first);
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return insts;
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}
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////////////////////////////////////////////////////////////////
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class ActivitySrchPred : public SearchPredNonLatch2
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@@ -100,6 +100,8 @@ public:
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void reportActivityAnnotation(bool report_unannotated,
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bool report_annotated);
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float clockMinPeriod();
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InstanceSeq highestPowerInstances(size_t count,
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const Corner *corner);
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protected:
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PwrActivity &activity(const Pin *pin);
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@@ -117,6 +117,14 @@ clock_min_period()
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return power->clockMinPeriod();
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}
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InstanceSeq
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highest_power_instances(size_t count,
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const Corner *corner)
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{
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Power *power = Sta::sta()->power();
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return power->highestPowerInstances(count, corner);
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}
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////////////////////////////////////////////////////////////////
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void
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+7
-1
@@ -32,6 +32,7 @@ namespace eval sta {
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define_cmd_args "report_power" \
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{ [-instances instances]\
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[-highest_power_instances count]\
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[-corner corner]\
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[-digits digits]\
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[> filename] [>> filename] }
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@@ -40,7 +41,7 @@ proc_redirect report_power {
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global sta_report_default_digits
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parse_key_args "report_power" args \
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keys {-instances -corner -digits} flags {}
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keys {-instances -highest_power_instances -corner -digits} flags {}
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check_argc_eq0 "report_power" $args
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@@ -58,6 +59,11 @@ proc_redirect report_power {
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if { [info exists keys(-instances)] } {
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set insts [get_instances_error "-instances" $keys(-instances)]
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report_power_insts $insts $corner $digits
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} elseif { [info exists keys(-highest_power_instances)] } {
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set count $keys(-highest_power_instances)
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check_positive_integer "-highest_power_instances" $count
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set insts [highest_power_instances $count $corner]
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report_power_insts $insts $corner $digits
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} else {
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report_power_design $corner $digits
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}
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@@ -146,7 +146,7 @@ VerilogReader::VerilogReader(NetworkReader *network) :
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{
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network->setLinkFunc([=] (const char *top_cell_name,
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bool make_black_boxes) -> Instance* {
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return linkNetwork(top_cell_name, make_black_boxes);
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return linkNetwork(top_cell_name, make_black_boxes, true);
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});
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constant10_max_ = stdstrPrint("%llu", std::numeric_limits<VerilogConstant10>::max());
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}
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@@ -1701,7 +1701,8 @@ private:
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Instance *
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VerilogReader::linkNetwork(const char *top_cell_name,
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bool make_black_boxes)
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bool make_black_boxes,
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bool delete_modules)
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{
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if (library_) {
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Cell *top_cell = network_->findCell(library_, top_cell_name);
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@@ -1729,7 +1730,8 @@ VerilogReader::linkNetwork(const char *top_cell_name,
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}
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makeModuleInstBody(module, top_instance, &bindings, make_black_boxes);
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bool errors = reportLinkErrors();
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deleteModules();
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if (delete_modules)
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deleteModules();
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if (errors) {
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network_->deleteInstance(top_instance);
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return nullptr;
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@@ -147,7 +147,8 @@ public:
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int to_index);
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VerilogModule *module(Cell *cell);
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Instance *linkNetwork(const char *top_cell_name,
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bool make_black_boxes);
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bool make_black_boxes,
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bool delete_modules);
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const char *filename() const { return filename_.c_str(); }
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void incrLine();
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Report *report() const { return report_; }
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