Merge branch 'master' into write_timing_model
Signed-off-by: James Cherry <cherry@parallaxsw.com>
This commit is contained in:
commit
05cdbd5e8f
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@ -710,10 +710,9 @@ GraphDelayCalc1::driveCellDefaultFromPort(LibertyCell *cell,
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{
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{
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LibertyPort *from_port = 0;
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LibertyPort *from_port = 0;
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int from_port_index = 0;
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int from_port_index = 0;
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LibertyCellTimingArcSetIterator set_iter(cell);
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LibertyCellTimingArcSetIterator set_iter(cell, nullptr, to_port);
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while (set_iter.hasNext()) {
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while (set_iter.hasNext()) {
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TimingArcSet *arc_set = set_iter.next();
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TimingArcSet *arc_set = set_iter.next();
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if (arc_set->to() == to_port) {
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LibertyPort *set_from_port = arc_set->from();
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LibertyPort *set_from_port = arc_set->from();
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int set_from_port_index = findPortIndex(cell, set_from_port);
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int set_from_port_index = findPortIndex(cell, set_from_port);
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if (from_port == nullptr
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if (from_port == nullptr
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@ -722,7 +721,6 @@ GraphDelayCalc1::driveCellDefaultFromPort(LibertyCell *cell,
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from_port_index = set_from_port_index;
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from_port_index = set_from_port_index;
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}
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}
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}
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}
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}
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return from_port;
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return from_port;
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}
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}
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@ -756,11 +754,9 @@ GraphDelayCalc1::findInputDriverDelay(LibertyCell *drvr_cell,
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debugPrint(debug_, "delay_calc", 2, " driver cell %s %s",
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debugPrint(debug_, "delay_calc", 2, " driver cell %s %s",
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drvr_cell->name(),
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drvr_cell->name(),
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rf->asString());
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rf->asString());
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LibertyCellTimingArcSetIterator set_iter(drvr_cell);
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LibertyCellTimingArcSetIterator set_iter(drvr_cell, from_port, to_port);
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while (set_iter.hasNext()) {
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while (set_iter.hasNext()) {
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TimingArcSet *arc_set = set_iter.next();
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TimingArcSet *arc_set = set_iter.next();
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if (arc_set->from() == from_port
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&& arc_set->to() == to_port) {
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TimingArcSetArcIterator arc_iter(arc_set);
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TimingArcSetArcIterator arc_iter(arc_set);
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while (arc_iter.hasNext()) {
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while (arc_iter.hasNext()) {
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TimingArc *arc = arc_iter.next();
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TimingArc *arc = arc_iter.next();
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@ -772,7 +768,6 @@ GraphDelayCalc1::findInputDriverDelay(LibertyCell *drvr_cell,
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}
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}
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}
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}
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}
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}
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}
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// Driving cell delay is the load dependent delay, which is the gate
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// Driving cell delay is the load dependent delay, which is the gate
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// delay minus the intrinsic delay. Driving cell delays are annotated
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// delay minus the intrinsic delay. Driving cell delays are annotated
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@ -447,6 +447,7 @@ public:
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float axisValue(size_t index) const { return (*values_)[index]; }
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float axisValue(size_t index) const { return (*values_)[index]; }
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// Find the index for value such that axis[index] <= value < axis[index+1].
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// Find the index for value such that axis[index] <= value < axis[index+1].
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size_t findAxisIndex(float value) const;
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size_t findAxisIndex(float value) const;
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FloatSeq *values() const { return values_; }
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private:
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private:
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TableAxisVariable variable_;
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TableAxisVariable variable_;
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@ -1008,7 +1008,7 @@ ReportPath::reportSummaryLine(PathEnd *end)
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if (end->isUnconstrained())
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if (end->isUnconstrained())
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reportSpaceFieldDelay(end->dataArrivalTimeOffset(this), early_late, line);
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reportSpaceFieldDelay(end->dataArrivalTimeOffset(this), early_late, line);
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else
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else
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reportSpaceFieldDelay(end->slack(this), early_late, line);
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reportSpaceFieldDelay(end->slack(this), EarlyLate::early(), line);
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report_->reportLineString(line);
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report_->reportLineString(line);
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}
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}
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