Merge pull request #106 from QuantamHD/sign_const
Fixes constant integer verilog parsing
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commit
058685adb5
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@ -11,6 +11,7 @@ module counter(clk, reset, in, out);
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(* src = "synthesis/tests/counter.v:18.14-18.19" *)
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input reset;
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input in;
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(* bottom_bound = 1'sh0 *)
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(* src = "synthesis/tests/counter.v:22.3-28.6", attr1 = "test_attr1", attr2 = "test_attr2" *)
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sky130_fd_sc_hd__dfrtp_1 _1415_ (
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.CLK(clk),
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@ -76,22 +76,22 @@ ID_TOKEN {ID_ESCAPED_TOKEN}|{ID_ALPHA_TOKEN}
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}
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}
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{SIGN}?{UNSIGNED_NUMBER}?"'"[bB][01_xz]+ {
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{SIGN}?{UNSIGNED_NUMBER}?"'"[sS]?[bB][01_xz]+ {
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VerilogParse_lval.constant = sta::stringCopy(VerilogLex_text);
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return CONSTANT;
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}
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{SIGN}?{UNSIGNED_NUMBER}?"'"[oO][0-7_xz]+ {
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{SIGN}?{UNSIGNED_NUMBER}?"'"[sS]?[oO][0-7_xz]+ {
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VerilogParse_lval.constant = sta::stringCopy(VerilogLex_text);
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return CONSTANT;
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}
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{SIGN}?{UNSIGNED_NUMBER}?"'"[dD][0-9_]+ {
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{SIGN}?{UNSIGNED_NUMBER}?"'"[sS]?[dD][0-9_]+ {
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VerilogParse_lval.constant = sta::stringCopy(VerilogLex_text);
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return CONSTANT;
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}
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{SIGN}?{UNSIGNED_NUMBER}?"'"[hH][0-9a-fA-F_xz]+ {
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{SIGN}?{UNSIGNED_NUMBER}?"'"[sS]?[hH][0-9a-fA-F_xz]+ {
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VerilogParse_lval.constant = sta::stringCopy(VerilogLex_text);
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return CONSTANT;
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}
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