write_verilog -remove_cells
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@ -57,7 +57,7 @@ protected:
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const char *filename_;
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bool sort_;
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bool include_pwr_gnd_;
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CellSet remove_cells_;
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LibertyCellSet remove_cells_;
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FILE *stream_;
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Network *network_;
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@ -101,7 +101,7 @@ VerilogWriter::VerilogWriter(const char *filename,
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{
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if (remove_cells) {
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for(LibertyCell *lib_cell : *remove_cells)
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remove_cells_.insert(network->cell(lib_cell));
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remove_cells_.insert(lib_cell);
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}
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}
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@ -219,7 +219,8 @@ void
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VerilogWriter::writeChild(Instance *child)
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{
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Cell *child_cell = network_->cell(child);
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if (!remove_cells_.hasKey(child_cell)) {
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LibertyCell *lib_cell = network_->libertyCell(child_cell);
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if (!remove_cells_.hasKey(lib_cell)) {
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const char *child_name = network_->name(child);
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const char *child_vname = instanceVerilogName(child_name,
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network_->pathEscape());
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