50 lines
1.3 KiB
Makefile
50 lines
1.3 KiB
Makefile
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# OpenSTA, Static Timing Analyzer
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# Copyright (c) 2018, Parallax Software, Inc.
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#
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# This program is free software: you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation, either version 3 of the License, or
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# (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program. If not, see <https://www.gnu.org/licenses/>.
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lib_LTLIBRARIES = libverilog.la
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include_HEADERS = \
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Verilog.hh \
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VerilogReader.hh
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libverilog_la_SOURCES = \
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VerilogLex.ll \
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VerilogParse.yy \
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VerilogReader.cc
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VerilogLex.ll: VerilogParse.hh
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# Rules to support automake pre 1.12 that name header .h instead of .hh
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VerilogParse.hh: VerilogParse.cc
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if test -f VerilogParse.h; then \
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cp VerilogParse.h VerilogParse.hh; \
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fi
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EXTRA_DIST = \
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VerilogParse.hh \
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Verilog.i \
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Verilog.tcl
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MAINTAINERCLEANFILES = \
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VerilogParse.hh \
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VerilogParse.cc \
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VerilogLex.cc
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libs: $(lib_LTLIBRARIES)
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xtags: $(SOURCES) $(HEADERS)
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etags -a -o ../TAGS $(SOURCES) $(HEADERS)
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