OpenSTA/dcalc/DelayCalcBase.cc

133 lines
4.5 KiB
C++
Raw Normal View History

DelayCalc reorg commit 410ed56c2c2d0d7afb0e84d0c65d5ff75234e9e3 Author: James Cherry <cherry@parallaxsw.com> Date: Sun Nov 19 08:44:13 2023 -0700 ArcDelayCalcBase -> DelayCalcBase Signed-off-by: James Cherry <cherry@parallaxsw.com> commit 1fdfebe2838c47f6c1866c8a10b14df6439506e0 Author: James Cherry <cherry@parallaxsw.com> Date: Sun Nov 19 08:25:36 2023 -0700 LumpedCapDelayCalc::inputPortDelay Signed-off-by: James Cherry <cherry@parallaxsw.com> commit 3a5e1d01aaff240b2f71d006d620ccd6a70bce6d Author: James Cherry <cherry@parallaxsw.com> Date: Fri Nov 17 16:32:32 2023 -0700 gateDelayInit cleanup Signed-off-by: James Cherry <cherry@parallaxsw.com> commit d0133319126ae4a488a7b31679fbf6507c7f6266 Author: James Cherry <cherry@parallaxsw.com> Date: Fri Nov 17 15:36:12 2023 -0700 mv RCDelayCalc to ArcDelayCalcBase Signed-off-by: James Cherry <cherry@parallaxsw.com> commit fd028e6ba5e092243a84685eb1756a8e4e4bad76 Author: James Cherry <cherry@parallaxsw.com> Date: Fri Nov 17 14:32:53 2023 -0700 ArcDelayCalcBase Signed-off-by: James Cherry <cherry@parallaxsw.com> commit 0ce9cf4c766f7419b998b40aed5af14df97249f1 Author: James Cherry <cherry@parallaxsw.com> Date: Fri Nov 17 10:57:41 2023 -0700 ParallelArcDelayCalc -> ParallelDelayCalc Signed-off-by: James Cherry <cherry@parallaxsw.com> commit 7fa7db6b252f1450fa5b546f5d33d8cb8a94d4bb Author: James Cherry <cherry@parallaxsw.com> Date: Fri Nov 17 08:45:01 2023 -0700 parallelGateDelay args Signed-off-by: James Cherry <cherry@parallaxsw.com> commit 6b85756774ce049c0f5f123f6d60ebbcd62cdd2b Author: James Cherry <cherry@parallaxsw.com> Date: Thu Nov 16 19:55:20 2023 -0700 TimingModel cell_ Signed-off-by: James Cherry <cherry@parallaxsw.com> commit e536d6b0ca0d01e2ad8bd609ad20f9a02497d8f5 Author: James Cherry <cherry@parallaxsw.com> Date: Thu Nov 16 18:07:11 2023 -0700 TimingModel cell_ Signed-off-by: James Cherry <cherry@parallaxsw.com> commit d2d622da4206e06d176e4ae741334fde8df35007 Author: James Cherry <cherry@parallaxsw.com> Date: Thu Nov 16 17:21:15 2023 -0700 rm drvr_cell from arc dcalc funcs Signed-off-by: James Cherry <cherry@parallaxsw.com> commit 522961e8f58bc1a0f0530a0a5218086280a2bcb0 Author: James Cherry <cherry@parallaxsw.com> Date: Thu Nov 16 16:24:34 2023 -0700 tr -> rf Signed-off-by: James Cherry <cherry@parallaxsw.com> commit 29aa0ed40345611b9e3a898342ecc17f6355396f Author: James Cherry <cherry@parallaxsw.com> Date: Thu Nov 16 13:17:44 2023 -0700 GraphDelayCalc Signed-off-by: James Cherry <cherry@parallaxsw.com> commit 934d9f19c52c62925b23ae9b457f14d25e818f1a Author: James Cherry <cherry@parallaxsw.com> Date: Thu Nov 16 12:52:55 2023 -0700 ParallelArcDelayCalc Signed-off-by: James Cherry <cherry@parallaxsw.com> commit d5687d9482ad0f572b017f0ef806ba8e6ff8b6fa Author: James Cherry <cherry@parallaxsw.com> Date: Thu Nov 16 12:16:05 2023 -0700 ParallelArcDelayCalc pvt Signed-off-by: James Cherry <cherry@parallaxsw.com> commit 0de501e5bf2329364b572d1360c18d5aedf3b841 Author: James Cherry <cherry@parallaxsw.com> Date: Thu Nov 16 10:46:22 2023 -0700 ParallelArcDelayCalc::findMultiDrvrGateDelay Signed-off-by: James Cherry <cherry@parallaxsw.com> commit d7457b9e335ed5fa583798e0512914aab6524fcc Author: James Cherry <cherry@parallaxsw.com> Date: Thu Nov 16 10:19:01 2023 -0700 mv multi_drvr_slew_factor_ to ParallelArcDelayCalc Signed-off-by: James Cherry <cherry@parallaxsw.com> commit afec4daa2ab6dd61a2450f1ac8a8cad1ef015a29 Author: James Cherry <cherry@parallaxsw.com> Date: Thu Nov 16 08:02:40 2023 -0700 MultiDrvrNet::net_caps vector Signed-off-by: James Cherry <cherry@parallaxsw.com> commit b450b3a35616ffc8d85610158a91c5d9483b6958 Author: James Cherry <cherry@parallaxsw.com> Date: Thu Nov 16 07:46:43 2023 -0700 sic Signed-off-by: James Cherry <cherry@parallaxsw.com> commit 65767403b3b2ab4e6f7552625accf9aa4766628a Author: James Cherry <cherry@parallaxsw.com> Date: Tue Nov 14 17:49:22 2023 -0700 Sta::connectedCap simplify Signed-off-by: James Cherry <cherry@parallaxsw.com> commit 85bdb8f3362413e7b05f49447a0383140cbb924f Author: James Cherry <cherry@parallaxsw.com> Date: Tue Nov 14 16:43:38 2023 -0700 ParallelArcDelayCalc Signed-off-by: James Cherry <cherry@parallaxsw.com> commit 4feea3ba2277d53697b644d79832e309ce98058a Author: James Cherry <cherry@parallaxsw.com> Date: Tue Nov 14 15:10:18 2023 -0700 mv parallel dcalc to arc delay calc Signed-off-by: James Cherry <cherry@parallaxsw.com> commit 915ed28a2c05acce6569c7933366ef94da8bfaeb Author: James Cherry <cherry@parallaxsw.com> Date: Mon Nov 13 17:47:14 2023 -0700 rm MultiDrvrNet::delays_valid_ Signed-off-by: James Cherry <cherry@parallaxsw.com> commit 2384eb4e5bdca1410c4bf5e23f35bfb49f013e74 Author: James Cherry <cherry@parallaxsw.com> Date: Mon Nov 13 16:02:57 2023 -0700 mkae MultiDrvrNets on the fly Signed-off-by: James Cherry <cherry@parallaxsw.com> Signed-off-by: James Cherry <cherry@parallaxsw.com>
2023-11-19 18:04:45 +01:00
// OpenSTA, Static Timing Analyzer
// Copyright (c) 2023, Parallax Software, Inc.
//
// This program is free software: you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundation, either version 3 of the License, or
// (at your option) any later version.
//
// This program is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
// GNU General Public License for more details.
//
// You should have received a copy of the GNU General Public License
// along with this program. If not, see <https://www.gnu.org/licenses/>.
#include "DelayCalcBase.hh"
#include "Liberty.hh"
#include "TimingArc.hh"
#include "Network.hh"
#include "Parasitics.hh"
namespace sta {
DelayCalcBase::DelayCalcBase(StaState *sta) :
ArcDelayCalc(sta)
{
}
void
DelayCalcBase::finishDrvrPin()
{
for (auto parasitic : unsaved_parasitics_)
parasitics_->deleteUnsavedParasitic(parasitic);
unsaved_parasitics_.clear();
for (auto drvr_pin : reduced_parasitic_drvrs_)
parasitics_->deleteDrvrReducedParasitics(drvr_pin);
reduced_parasitic_drvrs_.clear();
}
void
DelayCalcBase::inputPortDelay(const Pin *,
float in_slew,
const RiseFall *rf,
const Parasitic *parasitic,
const DcalcAnalysisPt *)
{
drvr_cell_ = nullptr;
drvr_library_ = network_->defaultLibertyLibrary();
drvr_slew_ = in_slew;
drvr_rf_ = rf;
drvr_parasitic_ = parasitic;
input_port_ = true;
}
void
DelayCalcBase::gateDelayInit(const TimingArc *arc,
const Slew &in_slew,
const Parasitic *drvr_parasitic)
{
drvr_cell_ = arc->from()->libertyCell();
drvr_library_ = drvr_cell_->libertyLibrary();
drvr_rf_ = arc->toEdge()->asRiseFall();
drvr_slew_ = in_slew;
drvr_parasitic_ = drvr_parasitic;
input_port_ = false;
}
// For DSPF on an input port the elmore delay is used as the time
// constant of an exponential waveform. The delay to the logic
// threshold and slew are computed for the exponential waveform.
// Note that this uses the driver thresholds and relies on
// thresholdAdjust to convert the delay and slew to the load's thresholds.
void
DelayCalcBase::dspfWireDelaySlew(const Pin *,
float elmore,
ArcDelay &wire_delay,
Slew &load_slew)
{
float vth = drvr_library_->inputThreshold(drvr_rf_);
float vl = drvr_library_->slewLowerThreshold(drvr_rf_);
float vh = drvr_library_->slewUpperThreshold(drvr_rf_);
float slew_derate = drvr_library_->slewDerateFromLibrary();
wire_delay = -elmore * log(1.0 - vth);
load_slew = drvr_slew_ + elmore * log((1.0 - vl) / (1.0 - vh)) / slew_derate;
}
void
DelayCalcBase::thresholdAdjust(const Pin *load_pin,
ArcDelay &load_delay,
Slew &load_slew)
{
LibertyLibrary *load_library = thresholdLibrary(load_pin);
if (load_library
&& drvr_library_
&& load_library != drvr_library_) {
float drvr_vth = drvr_library_->outputThreshold(drvr_rf_);
float load_vth = load_library->inputThreshold(drvr_rf_);
float drvr_slew_delta = drvr_library_->slewUpperThreshold(drvr_rf_)
- drvr_library_->slewLowerThreshold(drvr_rf_);
float load_delay_delta =
delayAsFloat(load_slew) * ((load_vth - drvr_vth) / drvr_slew_delta);
load_delay += (drvr_rf_ == RiseFall::rise())
? load_delay_delta
: -load_delay_delta;
float load_slew_delta = load_library->slewUpperThreshold(drvr_rf_)
- load_library->slewLowerThreshold(drvr_rf_);
float drvr_slew_derate = drvr_library_->slewDerateFromLibrary();
float load_slew_derate = load_library->slewDerateFromLibrary();
load_slew = load_slew * ((load_slew_delta / load_slew_derate)
/ (drvr_slew_delta / drvr_slew_derate));
}
}
LibertyLibrary *
DelayCalcBase::thresholdLibrary(const Pin *load_pin)
{
if (network_->isTopLevelPort(load_pin))
// Input/output slews use the default (first read) library
// for slew thresholds.
return network_->defaultLibertyLibrary();
else {
LibertyPort *lib_port = network_->libertyPort(load_pin);
if (lib_port)
return lib_port->libertyCell()->libertyLibrary();
else
return network_->defaultLibertyLibrary();
}
}
} // namespace