14 lines
452 B
Tcl
14 lines
452 B
Tcl
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# prima reg1 asap7
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read_liberty asap7_invbuf.lib.gz
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read_liberty asap7_seq.lib.gz
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read_liberty asap7_simple.lib.gz
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read_verilog reg1_asap7.v
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link_design top
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create_clock -name clk -period 500 {clk1 clk2 clk3}
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set_input_delay -clock clk 1 {in1 in2}
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set_input_transition 10 {in1 in2 clk1 clk2 clk3}
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set_propagated_clock {clk1 clk2 clk3}
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read_spef reg1_asap7.spef
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sta::set_delay_calculator prima
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report_checks -fields {input_pins slew} -format full_clock
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