22 lines
727 B
Plaintext
22 lines
727 B
Plaintext
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Warning: liberty_arcs_one2one_1.lib line 48, timing port A and related port Y are different sizes.
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report_edges -from partial_wide_inv_cell/A[0]
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A[0] -> Y[0] combinational
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^ -> v 1.00:1.00
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v -> ^ 1.00:1.00
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report_edges -from partial_wide_inv_cell/A[1]
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A[1] -> Y[1] combinational
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^ -> v 1.00:1.00
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v -> ^ 1.00:1.00
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report_edges -from partial_wide_inv_cell/A[2]
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A[2] -> Y[2] combinational
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^ -> v 1.00:1.00
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v -> ^ 1.00:1.00
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report_edges -from partial_wide_inv_cell/A[3]
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A[3] -> Y[3] combinational
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^ -> v 1.00:1.00
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v -> ^ 1.00:1.00
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report_edges -from partial_wide_inv_cell/A[4]
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report_edges -from partial_wide_inv_cell/A[5]
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report_edges -from partial_wide_inv_cell/A[6]
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report_edges -from partial_wide_inv_cell/A[7]
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