mirror of https://github.com/VLSIDA/OpenRAM.git
521 lines
21 KiB
Python
521 lines
21 KiB
Python
import gdsMill
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import tech
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from contact import contact
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import math
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import debug
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from globals import OPTS
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from pin_layout import pin_layout
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from vector3d import vector3d
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from router import router
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from direction import direction
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import grid
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import grid_utils
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class supply_router(router):
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"""
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A router class to read an obstruction map from a gds and
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routes a grid to connect the supply on the two layers.
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"""
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def __init__(self, layers, design, gds_filename=None):
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"""
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This will route on layers in design. It will get the blockages from
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either the gds file name or the design itself (by saving to a gds file).
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"""
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router.__init__(self, layers, design, gds_filename)
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# We over-ride the regular router costs to allow
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# more off-direction router in the supply grid
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grid.VIA_COST = 1
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grid.NONPREFERRED_COST = 1
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grid.PREFERRED_COST = 1
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# The list of supply rails (grid sets) that may be routed
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self.supply_rails = {}
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self.supply_rail_wires = {}
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# This is the same as above but as a sigle set for the all the rails
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self.supply_rail_tracks = {}
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self.supply_rail_wire_tracks = {}
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# Power rail width in grid units.
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self.rail_track_width = 2
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def create_routing_grid(self):
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"""
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Create a sprase routing grid with A* expansion functions.
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"""
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size = self.ur - self.ll
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debug.info(1,"Size: {0} x {1}".format(size.x,size.y))
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import supply_grid
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self.rg = supply_grid.supply_grid(self.ll, self.ur, self.track_width)
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def route(self, vdd_name="vdd", gnd_name="gnd"):
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"""
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Add power supply rails and connect all pins to these rails.
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"""
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debug.info(1,"Running supply router on {0} and {1}...".format(vdd_name, gnd_name))
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self.vdd_name = vdd_name
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self.gnd_name = gnd_name
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# Clear the pins if we have previously routed
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if (hasattr(self,'rg')):
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self.clear_pins()
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else:
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# Creat a routing grid over the entire area
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# FIXME: This could be created only over the routing region,
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# but this is simplest for now.
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self.create_routing_grid()
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# Get the pin shapes
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self.find_pins_and_blockages([self.vdd_name, self.gnd_name])
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#self.write_debug_gds("pin_enclosures.gds",stop_program=False)
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# Add the supply rails in a mesh network and connect H/V with vias
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# Block everything
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self.prepare_blockages(self.gnd_name)
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# Determine the rail locations
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self.route_supply_rails(self.gnd_name,0)
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# Block everything
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self.prepare_blockages(self.vdd_name)
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# Determine the rail locations
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self.route_supply_rails(self.vdd_name,1)
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#self.write_debug_gds("debug_rails.gds",stop_program=True)
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remaining_vdd_pin_indices = self.route_simple_overlaps(vdd_name)
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remaining_gnd_pin_indices = self.route_simple_overlaps(gnd_name)
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#self.write_debug_gds("debug_simple_route.gds",stop_program=True)
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# Route the supply pins to the supply rails
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# Route vdd first since we want it to be shorter
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self.route_pins_to_rails(vdd_name, remaining_vdd_pin_indices)
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self.route_pins_to_rails(gnd_name, remaining_gnd_pin_indices)
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#self.write_debug_gds("debug_pin_routes.gds",stop_program=True)
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#self.write_debug_gds("final.gds")
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return True
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def route_simple_overlaps(self, pin_name):
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"""
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This checks for simple cases where a pin component already overlaps a supply rail.
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It will add an enclosure to ensure the overlap in wide DRC rule cases.
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"""
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num_components = self.num_pin_components(pin_name)
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remaining_pins = []
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supply_tracks = self.supply_rail_tracks[pin_name]
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for index in range(num_components):
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pin_in_tracks = self.pin_grids[pin_name][index]
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common_set = supply_tracks & pin_in_tracks
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if len(common_set)==0:
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# if no overlap, add it to the complex route pins
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remaining_pins.append(index)
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else:
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self.create_simple_overlap_enclosure(pin_name, common_set)
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return remaining_pins
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def recurse_simple_overlap_enclosure(self, pin_name, start_set, direct):
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"""
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Recursive function to return set of tracks that connects to
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the actual supply rail wire in a given direction (or terminating
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when any track is no longer in the supply rail.
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"""
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next_set = grid_utils.expand_border(start_set, direct)
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supply_tracks = self.supply_rail_tracks[pin_name]
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supply_wire_tracks = self.supply_rail_wire_tracks[pin_name]
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supply_overlap = next_set & supply_tracks
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wire_overlap = next_set & supply_wire_tracks
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# If the rail overlap is the same, we are done, since we connected to the actual wire
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if len(wire_overlap)==len(start_set):
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new_set = start_set | wire_overlap
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# If the supply overlap is the same, keep expanding unti we hit the wire or move out of the rail region
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elif len(supply_overlap)==len(start_set):
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recurse_set = self.recurse_simple_overlap_enclosure(pin_name, supply_overlap, direct)
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new_set = start_set | supply_overlap | recurse_set
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else:
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# If we got no next set, we are done, can't expand!
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new_set = set()
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return new_set
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def create_simple_overlap_enclosure(self, pin_name, start_set):
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"""
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This takes a set of tracks that overlap a supply rail and creates an enclosure
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that is ensured to overlap the supply rail wire.
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It then adds rectangle(s) for the enclosure.
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"""
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additional_set = set()
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# Check the layer of any element in the pin to determine which direction to route it
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e = next(iter(start_set))
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new_set = start_set.copy()
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if e.z==0:
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new_set = self.recurse_simple_overlap_enclosure(pin_name, start_set, direction.NORTH)
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if not new_set:
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new_set = self.recurse_simple_overlap_enclosure(pin_name, start_set, direction.SOUTH)
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else:
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new_set = self.recurse_simple_overlap_enclosure(pin_name, start_set, direction.EAST)
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if not new_set:
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new_set = self.recurse_simple_overlap_enclosure(pin_name, start_set, direction.WEST)
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enclosure_list = self.compute_enclosures(new_set)
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for pin in enclosure_list:
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debug.info(2,"Adding simple overlap enclosure {0} {1}".format(pin_name, pin))
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self.cell.add_rect(layer=pin.layer,
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offset=pin.ll(),
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width=pin.width(),
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height=pin.height())
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def finalize_supply_rails(self, name):
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"""
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Determine which supply rails overlap and can accomodate a via.
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Remove any supply rails that do not have a via since they are disconnected.
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NOTE: It is still possible though unlikely that there are disconnected groups of rails.
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"""
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all_rails = self.supply_rail_wires[name]
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connections = set()
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via_areas = []
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for i1,r1 in enumerate(all_rails):
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# Only consider r1 horizontal rails
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e = next(iter(r1))
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if e.z==1:
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continue
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# We need to move this rail to the other layer for the z indices to match
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# during the intersection. This also makes a copy.
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new_r1 = {vector3d(i.x,i.y,1) for i in r1}
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# If horizontal, subtract off the left/right track to prevent end of rail via
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#ll = grid_utils.get_lower_left(new_r1)
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#ur = grid_utils.get_upper_right(new_r1)
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grid_utils.remove_border(new_r1, direction.EAST)
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grid_utils.remove_border(new_r1, direction.WEST)
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for i2,r2 in enumerate(all_rails):
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# Never compare to yourself
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if i1==i2:
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continue
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# Only consider r2 vertical rails
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e = next(iter(r2))
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if e.z==0:
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continue
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# Need to maek a copy to consider via overlaps to ignore the end-caps
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new_r2 = r2.copy()
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grid_utils.remove_border(new_r2, direction.NORTH)
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grid_utils.remove_border(new_r2, direction.SOUTH)
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# Determine if we hhave sufficient overlap and, if so,
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# remember:
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# the indices to determine a rail is connected to another
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# the overlap area for placement of a via
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overlap = new_r1 & new_r2
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if len(overlap) >= self.supply_rail_wire_width**2:
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debug.info(2,"Via overlap {0} {1} {2}".format(len(overlap),self.supply_rail_wire_width**2,overlap))
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connections.add(i1)
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connections.add(i2)
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via_areas.append(overlap)
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# Go through and add the vias at the center of the intersection
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for area in via_areas:
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ll = grid_utils.get_lower_left(area)
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ur = grid_utils.get_upper_right(area)
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center = (ll + ur).scale(0.5,0.5,0)
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self.add_via(center,self.rail_track_width)
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# Determien which indices were not connected to anything above
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all_indices = set([x for x in range(len(self.supply_rails[name]))])
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missing_indices = all_indices ^ connections
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# Go through and remove those disconnected indices
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# (No via was added, so that doesn't need to be removed)
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for rail_index in missing_indices:
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ll = grid_utils.get_lower_left(all_rails[rail_index])
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ur = grid_utils.get_upper_right(all_rails[rail_index])
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debug.info(1,"Removing disconnected supply rail {0} .. {1}".format(ll,ur))
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self.supply_rails[name].pop(rail_index)
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self.supply_rail_wires[name].pop(rail_index)
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# Make the supply rails into a big giant set of grids for easy blockages.
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# Must be done after we determine which ones are connected.
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self.create_supply_track_set(name)
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def add_supply_rails(self, name):
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"""
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Add the shapes that represent the routed supply rails.
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This is after the paths have been pruned and only include rails that are
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connected with vias.
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"""
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for rail in self.supply_rails[name]:
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ll = grid_utils.get_lower_left(rail)
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ur = grid_utils.get_upper_right(rail)
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z = ll.z
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pin = self.compute_wide_enclosure(ll, ur, z, name)
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debug.info(1,"Adding supply rail {0} {1}->{2} {3}".format(name,ll,ur,pin))
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self.cell.add_layout_pin(text=name,
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layer=pin.layer,
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offset=pin.ll(),
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width=pin.width(),
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height=pin.height())
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def compute_supply_rail_dimensions(self):
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"""
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Compute the supply rail dimensions including wide metal spacing rules.
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"""
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self.max_yoffset = self.rg.ur.y
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self.max_xoffset = self.rg.ur.x
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# Longest length is conservative
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rail_length = max(self.max_yoffset,self.max_xoffset)
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# Convert the number of tracks to dimensions to get the design rule spacing
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rail_width = self.track_width*self.rail_track_width
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# Get the conservative width and spacing of the top rails
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(horizontal_width, horizontal_space) = self.get_layer_width_space(0, rail_width, rail_length)
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(vertical_width, vertical_space) = self.get_layer_width_space(1, rail_width, rail_length)
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width = max(horizontal_width, vertical_width)
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space = max(horizontal_space, vertical_space)
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# This is the supply rail pitch in terms of routing grids
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# i.e. a rail of self.rail_track_width needs this many tracks including
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# space
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track_pitch = self.rail_track_width*width + space
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# Determine the pitch (in tracks) of the rail wire + spacing
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self.supply_rail_width = math.ceil(track_pitch/self.track_width)
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debug.info(1,"Rail step: {}".format(self.supply_rail_width))
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# Conservatively determine the number of tracks that the rail actually occupies
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space_tracks = math.ceil(space/self.track_width)
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self.supply_rail_wire_width = self.supply_rail_width - space_tracks
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debug.info(1,"Rail wire tracks: {}".format(self.supply_rail_wire_width))
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total_space = self.supply_rail_width - self.supply_rail_wire_width
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self.supply_rail_space_width = math.floor(0.5*total_space)
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debug.info(1,"Rail space tracks: {} (on both sides)".format(self.supply_rail_space_width))
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def compute_supply_rails(self, name, supply_number):
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"""
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Compute the unblocked locations for the horizontal and vertical supply rails.
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Go in a raster order from bottom to the top (for horizontal) and left to right
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(for vertical). Start with an initial start_offset in x and y direction.
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"""
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self.supply_rails[name]=[]
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self.supply_rail_wires[name]=[]
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start_offset = supply_number*self.supply_rail_width
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# Horizontal supply rails
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for offset in range(start_offset, self.max_yoffset, 2*self.supply_rail_width):
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# Seed the function at the location with the given width
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wave = [vector3d(0,offset+i,0) for i in range(self.supply_rail_width)]
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# While we can keep expanding east in this horizontal track
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while wave and wave[0].x < self.max_xoffset:
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added_rail = self.find_supply_rail(name, wave, direction.EAST)
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if added_rail:
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wave = added_rail.neighbor(direction.EAST)
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else:
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wave = None
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# Vertical supply rails
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max_offset = self.rg.ur.x
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for offset in range(start_offset, self.max_xoffset, 2*self.supply_rail_width):
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# Seed the function at the location with the given width
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wave = [vector3d(offset+i,0,1) for i in range(self.supply_rail_width)]
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# While we can keep expanding north in this vertical track
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while wave and wave[0].y < self.max_yoffset:
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added_rail = self.find_supply_rail(name, wave, direction.NORTH)
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if added_rail:
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wave = added_rail.neighbor(direction.NORTH)
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else:
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wave = None
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def find_supply_rail(self, name, seed_wave, direct):
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"""
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Find a start location, probe in the direction, and see if the rail is big enough
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to contain a via, and, if so, add it.
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"""
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start_wave = self.find_supply_rail_start(name, seed_wave, direct)
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if not start_wave:
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return None
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wave_path = self.probe_supply_rail(name, start_wave, direct)
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if self.approve_supply_rail(name, wave_path):
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return wave_path
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else:
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return None
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def find_supply_rail_start(self, name, seed_wave, direct):
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"""
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This finds the first valid starting location and routes a supply rail
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in the given direction.
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It returns the space after the end of the rail to seed another call for multiple
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supply rails in the same "track" when there is a blockage.
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"""
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# Sweep to find an initial unblocked valid wave
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start_wave = self.rg.find_start_wave(seed_wave, len(seed_wave), direct)
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return start_wave
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def probe_supply_rail(self, name, start_wave, direct):
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"""
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This finds the first valid starting location and routes a supply rail
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in the given direction.
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It returns the space after the end of the rail to seed another call for multiple
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supply rails in the same "track" when there is a blockage.
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"""
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# Expand the wave to the right
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wave_path = self.rg.probe(start_wave, direct)
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if not wave_path:
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return None
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# drop the first and last steps to leave escape routing room
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# around the blockage that stopped the probe
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# except, don't drop the first if it is the first in a row/column
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if (direct==direction.NORTH and start_wave[0].y>0):
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wave_path.trim_first()
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elif (direct == direction.EAST and start_wave[0].x>0):
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wave_path.trim_first()
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wave_path.trim_last()
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return wave_path
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def approve_supply_rail(self, name, wave_path):
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"""
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Check if the supply rail is sufficient (big enough) and add it to the
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data structure. Return whether it was added or not.
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"""
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# We must have at least 2 tracks to drop plus 2 tracks for a via
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if len(wave_path)>=4*self.rail_track_width:
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grid_set = wave_path.get_grids()
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self.supply_rails[name].append(grid_set)
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start_wire_index = self.supply_rail_space_width
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end_wire_index = self.supply_rail_width - self.supply_rail_space_width
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wire_set = wave_path.get_wire_grids(start_wire_index,end_wire_index)
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self.supply_rail_wires[name].append(wire_set)
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return True
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return False
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def route_supply_rails(self, name, supply_number):
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"""
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Route the horizontal and vertical supply rails across the entire design.
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Must be done with lower left at 0,0
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"""
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# Compute the grid dimensions
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self.compute_supply_rail_dimensions()
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# Compute the grid locations of the supply rails
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self.compute_supply_rails(name, supply_number)
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# Add the supply rail vias (and prune disconnected rails)
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self.finalize_supply_rails(name)
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# Add the rails themselves
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self.add_supply_rails(name)
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def create_supply_track_set(self, pin_name):
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"""
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Make a single set of all the tracks for the rail and wire itself.
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"""
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rail_set = set()
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for rail in self.supply_rails[pin_name]:
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rail_set.update(rail)
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self.supply_rail_tracks[pin_name] = rail_set
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wire_set = set()
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for rail in self.supply_rail_wires[pin_name]:
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wire_set.update(rail)
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self.supply_rail_wire_tracks[pin_name] = wire_set
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def route_pins_to_rails(self, pin_name, remaining_component_indices):
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"""
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This will route each of the remaining pin components to the supply rails.
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After it is done, the cells are added to the pin blockage list.
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"""
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debug.info(1,"Pin {0} has {1} remaining components to route.".format(pin_name,
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len(remaining_component_indices)))
|
|
|
|
recent_paths = []
|
|
# For every component
|
|
for index in remaining_component_indices:
|
|
debug.info(2,"Routing component {0} {1}".format(pin_name, index))
|
|
|
|
self.rg.reinit()
|
|
|
|
self.prepare_blockages(pin_name)
|
|
|
|
# Add the single component of the pin as the source
|
|
# which unmarks it as a blockage too
|
|
self.add_pin_component_source(pin_name,index)
|
|
|
|
# Add all of the rails as targets
|
|
# Don't add the other pins, but we could?
|
|
self.add_supply_rail_target(pin_name)
|
|
|
|
# Add the previous paths as targets too
|
|
#self.add_path_target(recent_paths)
|
|
|
|
#print(self.rg.target)
|
|
|
|
# Actually run the A* router
|
|
if not self.run_router(detour_scale=5):
|
|
self.write_debug_gds()
|
|
|
|
recent_paths.append(self.paths[-1])
|
|
|
|
|
|
def add_supply_rail_target(self, pin_name):
|
|
"""
|
|
Add the supply rails of given name as a routing target.
|
|
"""
|
|
debug.info(2,"Add supply rail target {}".format(pin_name))
|
|
# Add the wire itself as the target
|
|
self.rg.set_target(self.supply_rail_wire_tracks[pin_name])
|
|
# But unblock all the rail tracks including the space
|
|
self.rg.set_blocked(self.supply_rail_tracks[pin_name],False)
|
|
|
|
|
|
def set_supply_rail_blocked(self, value=True):
|
|
"""
|
|
Add the supply rails of given name as a routing target.
|
|
"""
|
|
debug.info(3,"Blocking supply rail")
|
|
for rail_name in self.supply_rail_tracks:
|
|
self.rg.set_blocked(self.supply_rail_tracks[rail_name])
|
|
|