mirror of https://github.com/VLSIDA/OpenRAM.git
273 lines
10 KiB
Python
273 lines
10 KiB
Python
# See LICENSE for licensing information.
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#
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# Copyright (c) 2016-2021 Regents of the University of California and The Board
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# of Regents for the Oklahoma Agricultural and Mechanical College
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# (acting for and on behalf of Oklahoma State University)
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# All rights reserved.
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#
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from math import ceil, log
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from openram.sram_factory import factory
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from openram.base import vector, design
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from openram import OPTS
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from openram.tech import drc
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class rom_decoder(design):
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def __init__(self, num_outputs, cols, strap_spacing, name="", route_layer="m1", output_layer="m2"):
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# word lines/ rows / inputs in the base array become the address lines / cols / inputs in the decoder
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# bit lines / cols / outputs in the base array become the word lines / rows / outputs in the decoder
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# array gets rotated 90deg so that rows/cols switch
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self.strap_spacing=strap_spacing
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self.num_outputs = num_outputs
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self.num_inputs = ceil(log(num_outputs, 2))
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self.create_decode_map()
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# for i in range(2 * self.num_inputs): print(self.decode_map[i])
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super().__init__(name)
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b = factory.create(module_type=OPTS.bitcell)
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self.cell_height = b.height
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self.route_layer = route_layer
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self.output_layer = output_layer
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self.inv_route_layer = "m2"
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self.cols=cols
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self.create_netlist()
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self.create_layout()
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def create_netlist(self):
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self.add_modules()
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self.add_pins()
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self.create_instances()
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def create_layout(self):
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self.setup_layout_constants()
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self.place_array()
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self.place_input_buffer()
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self.place_driver()
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self.route_outputs()
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self.width = self.array_inst.height + self.wordline_buf_inst.width
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self.height = self.array_inst.width + self.buf_inst.height
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self.connect_inputs()
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# self.route_supplies()
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self.add_boundary()
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def setup_layout_constants(self):
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self.inv_route_width = drc["minwidth_{}".format(self.inv_route_layer)]
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def create_decode_map(self):
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self.decode_map = []
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# create decoding map that will be the bitmap for the rom decoder
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# row/col order in the map will be switched in the placed decoder/
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for col in range(self.num_inputs):
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# odd cols are address
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# even cols are address bar
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col_array = []
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inv_col_array = []
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for row in range(self.num_outputs):
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addr_idx = -col - 1
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addr = format(row, 'b')
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if col >= len(addr) :
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bin_digit = 0
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else:
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bin_digit = int(addr[addr_idx])
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col_array.append(bin_digit)
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# print("addr {0}, at indx {1}, digit {2}".format(addr, addr_idx, bin_digit))
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if bin_digit == 0 : inv_col_array.append(1)
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else : inv_col_array.append(0)
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self.decode_map.append(col_array)
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self.decode_map.append(inv_col_array)
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self.decode_map.reverse()
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def add_pins(self):
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for i in range(self.num_inputs):
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self.add_pin("A{0}".format(i), "INPUT")
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for j in range(self.num_outputs):
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self.add_pin("wl_{0}".format(j), "OUTPUT")
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self.add_pin("precharge_gate", "INPUT")
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self.add_pin("vdd", "POWER")
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self.add_pin("gnd", "GROUND")
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def add_modules(self):
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self.control_array = factory.create(module_type="rom_address_control_array", cols=self.num_inputs)
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self.wordline_buf = factory.create(module_type="rom_wordline_driver_array", module_name="{}_wordline_buffer".format(self.name), \
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rows=self.num_outputs, \
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cols=self.cols)
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self.array_mod = factory.create(module_type="rom_base_array", \
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module_name="{}_array".format(self.name), \
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cols=self.num_outputs, \
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rows=2 * self.num_inputs, \
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bitmap=self.decode_map,
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strap_spacing = self.strap_spacing,
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route_layer=self.route_layer,
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output_layer=self.output_layer)
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def create_instances(self):
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self.create_array_inst()
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self.create_input_buffer()
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self.create_wordline_buffer()
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def create_input_buffer(self):
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name = "pre_control_array"
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self.buf_inst = self.add_inst(name=name, mod=self.control_array)
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control_pins = []
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for i in range(self.num_inputs):
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control_pins.append("A{0}".format(i))
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control_pins.append("A{0}_int".format(i))
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control_pins.append("Abar{0}_int".format(i))
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control_pins.append("clk")
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control_pins.append("vdd")
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control_pins.append("gnd")
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self.connect_inst(control_pins)
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def create_array_inst(self):
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self.array_inst = self.add_inst(name="decode_array_inst", mod=self.array_mod)
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array_pins = []
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for j in range(self.num_outputs):
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name = "wl_int{0}".format(j)
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array_pins.append(name)
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for i in reversed(range(self.num_inputs)):
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array_pins.append("inbar_{0}".format(i))
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array_pins.append("in_{0}".format(i))
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array_pins.append("precharge_gate")
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array_pins.append("vdd")
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array_pins.append("gnd")
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self.connect_inst(array_pins)
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def create_wordline_buffer(self):
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self.wordline_buf_inst = self.add_inst("rom_wordline_driver", mod=self.wordline_buf)
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in_pins = ["wl_int{}".format(wl) for wl in range(self.num_outputs)]
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out_pins = ["wl_{}".format(wl) for wl in range(self.num_outputs)]
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pwr_pins = ["vdd", "gnd"]
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self.connect_inst(in_pins + out_pins + pwr_pins)
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def place_input_buffer(self):
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wl = self.array_mod.row_size - 1
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align = self.array_inst.get_pin(self.array_mod.wordline_names[0][wl]).cx() - self.buf_inst.get_pin("A0_out").cx()
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print("align: {}".format(align))
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self.buf_inst.place(vector(align, 0))
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def place_array(self):
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offset = vector(self.array_mod.height, self.control_array.height + self.m1_width + self.poly_contact.width)
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self.array_inst.place(offset, rotate=90)
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def place_driver(self):
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offset = vector(self.array_inst.height + self.m1_width, self.array_inst.by())
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self.wordline_buf_inst.place(offset)
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# calculate the offset between the decode array and the buffer inputs now that their zeros are aligned
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pin_offset = self.array_inst.get_pin("bl_0_0").cy() - self.wordline_buf_inst.get_pin("in_0").cy()
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self.wordline_buf_inst.place(offset + vector(0, pin_offset))
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def route_outputs(self):
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for j in range(self.num_outputs):
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self.copy_layout_pin(self.wordline_buf_inst, "out_{}".format(j), "wl_{}".format(j))
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array_pins = [self.array_inst.get_pin("bl_0_{}".format(bl)) for bl in range(self.num_outputs)]
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driver_pins = [self.wordline_buf_inst.get_pin("in_{}".format(bl)) for bl in range(self.num_outputs)]
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route_pins = array_pins + driver_pins
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self.connect_row_pins(self.output_layer, route_pins, round=True)
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def connect_inputs(self):
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self.copy_layout_pin(self.array_inst, "precharge")
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for i in range(self.num_inputs):
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wl = (self.num_inputs - i) * 2 - 1
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wl_bar = wl - 1
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addr_pin = self.array_inst.get_pin(self.array_mod.wordline_names[0][wl])
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addr_bar_pin = self.array_inst.get_pin(self.array_mod.wordline_names[0][wl_bar])
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addr_out_pin = self.buf_inst.get_pin("A{}_out".format(i))
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addr_bar_out_pin = self.buf_inst.get_pin("Abar{}_out".format(i))
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addr_middle = vector(addr_pin.cx(), addr_out_pin.cy())
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addr_bar_middle = vector(addr_bar_pin.cx(), addr_bar_out_pin.cy())
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self.add_path(self.inv_route_layer, [addr_out_pin.center(), addr_middle, addr_pin.center()])
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self.add_path(self.inv_route_layer, [addr_bar_out_pin.center(), addr_bar_middle, addr_bar_pin.center()])
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# self.add_segment_center(self.inv_route_layer, addr_bar_middle + vector(0, self.inv_route_width * 0.5), addr_bar_out_pin.center() + vector(0, self.inv_route_width * 0.5), self.inv_route_width)
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def route_supplies(self):
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minwidth = drc["minwidth_{}".format(self.inv_route_layer)]
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pitch = drc["{0}_to_{0}".format(self.inv_route_layer)]
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# route decode array vdd and inv array vdd together
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array_vdd = self.array_inst.get_pin("vdd")
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inv_vdd = self.buf_inst.get_pins("vdd")[-1]
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end = vector(array_vdd.cx(), inv_vdd.cy() - 0.5 * minwidth)
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self.add_segment_center("m1", array_vdd.center(), end)
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end = vector(array_vdd.cx() + 0.5 * minwidth, inv_vdd.cy())
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self.add_segment_center(self.route_layer, inv_vdd.center(), end)
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end = vector(array_vdd.cx(), inv_vdd.cy())
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self.add_via_stack_center(end, self.route_layer, "m1")
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self.add_layout_pin_rect_center("vdd", "m1", end)
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# route pin on inv gnd
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inv_gnd = self.buf_inst.get_pins("gnd")[0]
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array_gnd = self.array_inst.get_pins("gnd")
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# add x jog
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start = vector(array_gnd[0].cx(), inv_gnd.cy())
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self.add_via_stack_center(start, self.route_layer, "m1")
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self.add_layout_pin_rect_center("gnd", "m1", start)
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end = array_gnd[0].center()
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self.add_segment_center("m1", start, end)
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# add y jog
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width = minwidth
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height = array_gnd[0].uy() - array_gnd[-1].uy() + minwidth
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offset = vector(-0.5 *width ,0.5 * (array_gnd[0].cy() + array_gnd[-1].cy()))
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start = end - vector(0, 0.5 * minwidth)
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end = vector(start.x, array_gnd[1].uy())
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