Matt Guthaus 21967fccde Update bitcell and array section.

2018-02-12 15:30:38 -08:00

..

figs

Updates to intro and overview. Some edits to tech and DRC/LVS section.

2018-02-12 15:07:16 -08:00

control.tex

Adding old documentation. Partially updated intro and overview. It is very outdated.

2018-01-19 17:31:17 -08:00

debug.tex

Adding old documentation. Partially updated intro and overview. It is very outdated.

2018-01-19 17:31:17 -08:00

gdsmill.tex

Adding old documentation. Partially updated intro and overview. It is very outdated.

2018-01-19 17:31:17 -08:00

implementation.tex

Updates to intro and overview. Some edits to tech and DRC/LVS section.

2018-02-12 15:07:16 -08:00

intro.tex

Updates to intro and overview. Some edits to tech and DRC/LVS section.

2018-02-12 15:07:16 -08:00

Makefile

Adding old documentation. Partially updated intro and overview. It is very outdated.

2018-01-19 17:31:17 -08:00

modules.tex

Update bitcell and array section.

2018-02-12 15:30:38 -08:00

openram_manual.pdf

Update bitcell and array section.

2018-02-12 15:30:38 -08:00

openram_manual.tex

Updates to intro and overview. Some edits to tech and DRC/LVS section.

2018-02-12 15:07:16 -08:00

overview.tex

Updates to intro and overview. Some edits to tech and DRC/LVS section.

2018-02-12 15:07:16 -08:00

parameterized.tex

Adding old documentation. Partially updated intro and overview. It is very outdated.

2018-01-19 17:31:17 -08:00

porting.tex

Adding old documentation. Partially updated intro and overview. It is very outdated.

2018-01-19 17:31:17 -08:00

timing.tex

Adding old documentation. Partially updated intro and overview. It is very outdated.

2018-01-19 17:31:17 -08:00

unittests.tex

Adding old documentation. Partially updated intro and overview. It is very outdated.

2018-01-19 17:31:17 -08:00