mirror of https://github.com/VLSIDA/OpenRAM.git
142 lines
7.0 KiB
Python
142 lines
7.0 KiB
Python
from tech import drc
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import debug
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import design
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from vector import vector
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from hierarchical_predecode import hierarchical_predecode
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class hierarchical_predecode3x8(hierarchical_predecode):
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"""
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Pre 3x8 decoder used in hierarchical_decoder.
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"""
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def __init__(self, nmos_width, cellname):
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hierarchical_predecode.__init__(self, nmos_width, cellname, 3)
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self.add_pins()
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self.create_modules()
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self.setup_constrains()
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self.create_layout()
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self.route()
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def create_layout(self):
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self.create_rails()
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self.add_output_inverters()
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connections=[["A[0]", "A[1]", "A[2]", "Z[7]", "vdd", "gnd"],
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["A[0]", "A[1]", "B[2]", "Z[6]", "vdd", "gnd"],
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["A[0]", "B[1]", "A[2]", "Z[5]", "vdd", "gnd"],
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["A[0]", "B[1]", "B[2]", "Z[4]", "vdd", "gnd"],
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["B[0]", "A[1]", "A[2]", "Z[3]", "vdd", "gnd"],
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["B[0]", "A[1]", "B[2]", "Z[2]", "vdd", "gnd"],
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["B[0]", "B[1]", "A[2]", "Z[1]", "vdd", "gnd"],
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["B[0]", "B[1]", "B[2]", "Z[0]", "vdd", "gnd"]]
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self.add_nand(connections)
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def route_input_inverters(self):
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# All conections of the inputs inverters [Inputs, outputs, vdd, gnd]
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for inv_rout in range(self.number_of_inputs):
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output_shift = 1.5 * drc["minwidth_metal1"]
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if (inv_rout % 2 == 0):
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base_offset=[self.x_off_inv_1, inv_rout * self.inv.height ]
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y_dir = 1
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else:
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base_offset=[self.x_off_inv_1, 2 * self.inv.height - drc["minwidth_metal1"]]
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y_dir = -1
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inv_out_offset = base_offset+self.inv.Z_position.scale(1,y_dir)
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inv_in_offset = base_offset+self.inv.A_position.scale(1,y_dir)
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inv_vdd_offset = base_offset+self.inv.vdd_position.scale(1,y_dir)
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inv_gnd_offset = base_offset+self.inv.gnd_position.scale(1,y_dir)
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# output connection
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correct = y_dir * (output_shift + drc["minwidth_metal1"])
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off_via = [self.rails_x_offset[inv_rout + 5] + self.gap_between_rails,
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inv_vdd_offset.y - self.via_shift - correct]
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path1 = inv_out_offset + vector(0.5*drc["minwidth_metal1"],
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- 1.5*drc["minwidth_metal1"] - correct)
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path2 = vector(path1.x,
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inv_vdd_offset.y + 0.5 * drc["minwidth_metal1"] - correct)
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path3 = vector(self.rails_x_offset[inv_rout + 5] + drc["minwidth_metal2"],
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path2.y)
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self.add_path("metal1", [path1,path2,path3])
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self.add_via(layers=("metal1", "via1", "metal2"),
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offset=off_via,
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rotate=90)
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self.route_input_inverters_input(inv_rout,inv_in_offset)
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self.route_input_inverters_vdd(inv_vdd_offset)
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self.route_input_inverters_gnd(inv_gnd_offset)
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def route_nand_to_rails(self):
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# This 2D array defines the connection mapping of the Nand3 gates to
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# the rail
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nand3_input_line_combination = [[5, 6, 7], [5, 6, 10],
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[5, 9, 7], [5, 9, 10],
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[8, 6, 7], [8, 6, 10],
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[8, 9, 7], [8, 9, 10]]
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for k in range(self.number_of_outputs):
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index_lst = nand3_input_line_combination[k]
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line_x_offset = []
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for index in index_lst:
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line_x_offset.append(self.rails_x_offset[index])
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if (k % 2 == 0):
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y_off = k * (self.nand.height)
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y_dir =1
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correct = [0,0,self.contact_shift]
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else:
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y_off = 2 * self.inv.height - drc["minwidth_metal1"] + (k - 1) * (self.nand.height)
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y_dir = -1
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correct = [0,self.contact_shift,0]
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yoffset_nand_in = [y_off + y_dir*self.nand.A_position[1],
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y_off + y_dir*self.nand.B_position[1],
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y_off + y_dir*self.nand.C_position[1]]
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for i in range(self.number_of_inputs):
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# Connecting the i-th input of Nand3 gate
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self.add_rect(layer="metal1",
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offset=[line_x_offset[i], yoffset_nand_in[i]],
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width=self.x_off_nand - line_x_offset[i],
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height=drc["minwidth_metal1"])
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self.add_via(layers=("metal1", "via1", "metal2"),
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offset=[line_x_offset[i]+ self.gap_between_rails,
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yoffset_nand_in[i] - self.via_shift - correct[i]],
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rotate=90)
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#Extended of the top NAND2 to the left hand side input rails
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if(k == self.number_of_outputs - 1):
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for i in range(self.number_of_inputs):
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self.add_rect(layer="metal1",
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offset=[self.rails_x_offset[i], yoffset_nand_in[i]],
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width=self.x_off_nand - self.rails_x_offset[i],
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height=drc["minwidth_metal1"])
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self.add_via(layers=("metal1", "via1", "metal2"),
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offset=[self.rails_x_offset[i] + self.gap_between_rails,
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yoffset_nand_in[i] - self.via_shift],
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rotate=90)
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def route_vdd_gnd_from_rails_to_gates(self):
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for k in range(self.number_of_outputs):
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power_line_index = 4 - (k%2)
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yoffset = k * self.inv.height - 0.5 * drc["minwidth_metal1"]
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self.add_rect(layer="metal1",
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offset=[self.rails_x_offset[power_line_index], yoffset],
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width=self.x_off_nand - self.rails_x_offset[power_line_index],
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height=drc["minwidth_metal1"])
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self.add_via(layers=("metal1", "via1", "metal2"),
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offset=[self.rails_x_offset[power_line_index] + self.gap_between_rails,
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yoffset - self.via_shift - self.contact_shift],
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rotate=90)
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yoffset = (self.number_of_outputs * self.inv.height
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- 0.5 * drc["minwidth_metal1"])
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self.add_rect(layer="metal1",
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offset=[self.rails_x_offset[4], yoffset],
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width=self.x_off_nand - self.rails_x_offset[4],
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height=drc["minwidth_metal1"])
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self.add_rect(layer="metal2",
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offset=[self.rails_x_offset[4], self.rail_height],
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width=drc["minwidth_metal2"],
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height=yoffset - self.rail_height)
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self.add_via(layers=("metal1", "via1", "metal2"),
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offset=[self.rails_x_offset[4] + self.gap_between_rails - self.via_shift,
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yoffset - self.via_shift - self.contact_shift],
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rotate=90)
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