mirror of https://github.com/VLSIDA/OpenRAM.git
604 lines
26 KiB
Python
604 lines
26 KiB
Python
from tech import drc
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import debug
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import design
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from math import log
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from math import sqrt
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import math
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from contact import contact
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from nand_2 import nand_2
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from nand_3 import nand_3
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from pinv import pinv
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from hierarchical_predecode2x4 import hierarchical_predecode2x4 as pre2x4
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from hierarchical_predecode3x8 import hierarchical_predecode3x8 as pre3x8
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from vector import vector
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from globals import OPTS
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class hierarchical_decoder(design.design):
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"""
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Dynamically generated hierarchical decoder.
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"""
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def __init__(self, nand2_nmos_width, nand3_nmos_width, rows):
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design.design.__init__(self, "hierarchical_decoder")
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c = reload(__import__(OPTS.config.bitcell))
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self.mod_bitcell = getattr(c, OPTS.config.bitcell)
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self.bitcell_height = self.mod_bitcell.chars["height"]
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self.rows = rows
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self.nand2_nmos_width = nand2_nmos_width
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self.nand3_nmos_width = nand3_nmos_width
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self.num_inputs = int(math.log(self.rows, 2))
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self.create_layout()
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self.DRC_LVS()
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def create_layout(self):
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self.add_modules()
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self.setup_layout_offsets()
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self.setup_layout_constants()
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self.create_decoder()
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# We only need to call the offset_all_coordinate function when there
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# are vertical metal rails.
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if (self.num_inputs >= 4):
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self.offset_all_coordinates()
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def create_decoder(self):
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self.add_pins()
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self.dimensions_hierarchy_decoder()
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self.create_pre_decoder()
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self.create_row_decoder()
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self.create_vertical_rail()
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def add_modules(self):
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self.m1m2_via = contact(layer_stack=("metal1", "via1", "metal2"))
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# Vertical metal rail gap definition
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self.metal2_extend_contact = (self.m1m2_via.second_layer_height - self.m1m2_via.contact_width) / 2
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self.gap_between_rails = self.metal2_extend_contact + drc["metal2_to_metal2"]
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self.gap_between_rail_offset = self.gap_between_rails + drc["minwidth_metal2"]
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self.via_shift = (self.m1m2_via.second_layer_width - self.m1m2_via.first_layer_width) / 2
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# used to shift contact when connecting to NAND3 C pin down
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self.contact_shift = (self.m1m2_via.first_layer_width - self.m1m2_via.contact_width) / 2
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self.inv = pinv(name="pinverter",
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nmos_width=drc["minwidth_tx"],
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beta=2,
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height=self.bitcell_height)
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self.add_mod(self.inv)
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self.nand2 = nand_2(name="pnand2",
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nmos_width=self.nand2_nmos_width,
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height=self.bitcell_height)
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self.add_mod(self.nand2)
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self.nand3 = nand_3(name="pnand3",
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nmos_width=self.nand3_nmos_width,
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height=self.bitcell_height)
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self.add_mod(self.nand3)
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# CREATION OF PRE-DECODER
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self.pre2_4 = pre2x4(self.nand2_nmos_width,
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"pre2x4")
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self.add_mod(self.pre2_4)
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self.pre3_8 = pre3x8(self.nand3_nmos_width,
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"pre3x8")
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self.add_mod(self.pre3_8)
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def setup_layout_offsets(self):
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self.vdd_positions = []
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self.gnd_positions = []
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self.decode_out_positions = []
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self.A_positions = []
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self.pre_decoder_vdd_positions = []
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self.pre_decoder_gnd_positions = []
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def determine_predecodes(self,num_inputs):
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# Determines the number of 2:4 pre-decoder and 3:8 pre-decoder needed
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# based on the number of inputs
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if (num_inputs == 2):
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return (1,0)
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elif (num_inputs == 3):
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return(0,1)
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elif (num_inputs == 4):
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return(2,0)
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elif (num_inputs == 5):
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return(1,1)
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elif (num_inputs == 6):
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return(3,0)
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elif (num_inputs == 7):
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return(2,1)
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elif (num_inputs == 8):
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return(1,2)
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elif (num_inputs == 9):
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return(0,3)
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else:
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debug.error("Invalid number of inputs for hierarchical decoder")
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def setup_layout_constants(self):
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(p2x4,p3x8)=self.determine_predecodes(self.num_inputs)
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self.no_of_pre2x4=p2x4
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self.no_of_pre3x8=p3x8
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# Stromg the index of the vertical rails in different groups. These
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# vertical lines is used to connect pre-decoder to row-decoder
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self.predecoder_output_groups = [] # This array is a 2D array.
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self.group_sizes = []
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# Distributing vertical rails to different groups. One group belongs to one pre-decoder.
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# For example, for two 2:4 pre-decoder and one 3:8 pre-decoder, we will
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# have total 16 output lines out of these 3 pre-decoders and they will
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# be distributed as [ [0,1,2,3] ,[4,5,6,7], [8,9,10,11,12,13,14,15] ]
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# in self.predecoder_output_groups
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index = 0
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for i in range(self.no_of_pre2x4):
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lines = []
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for j in range(4):
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lines.append(index)
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index = index + 1
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self.predecoder_output_groups.append(lines)
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self.group_sizes.append(4)
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for i in range(self.no_of_pre3x8):
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lines = []
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for j in range(8):
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lines.append(index)
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index = index + 1
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self.predecoder_output_groups.append(lines)
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self.group_sizes.append(8)
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def add_pins(self):
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for i in range(self.num_inputs):
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self.add_pin("A[{0}]".format(i))
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if(self.num_inputs >= 4):
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for j in range(self.rows):
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self.add_pin("decode_out[{0}]".format(j))
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else:
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for j in range(self.rows):
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self.add_pin("out[{0}]".format(j))
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self.add_pin("vdd")
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self.add_pin("gnd")
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def dimensions_hierarchy_decoder(self):
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self.total_number_of_predecoder_outputs = (4 * self.no_of_pre2x4
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+ 8 * self.no_of_pre3x8)
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# Calculates height and width of pre-decoder,
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if(self.no_of_pre3x8 > 0):
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self.predecoder_width = self.pre3_8.width
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else:
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self.predecoder_width = self.pre2_4.width
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self.predecoder_height = (self.pre2_4.height * self.no_of_pre2x4
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+ self.pre3_8.height * self.no_of_pre3x8)
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# Calculates height and width of row-decoder
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if (self.num_inputs == 4 or self.num_inputs == 5):
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nand_width = self.nand2.width
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else:
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nand_width = self.nand3.width
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total_gap = (self.gap_between_rail_offset
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* self.total_number_of_predecoder_outputs)
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self.row_decoder_width = (nand_width + total_gap
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+ self.inv.width)
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self.row_decoder_height = self.inv.height * self.rows
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# Calculates height and width of hierarchical decoder
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self.height = (self.predecoder_height
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+ self.row_decoder_height)
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self.width = self.predecoder_width + total_gap
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def create_pre_decoder(self):
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""" Creates pre-decoder and places labels input address [A] """
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for i in range(self.no_of_pre2x4):
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self.add_pre2x4(i)
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self.add_lables_pre2x4(i)
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for j in range(self.no_of_pre3x8):
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pre3x8_yoffset=self.add_pre3x8(j)
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self.add_lables_pre3x8(j,pre3x8_yoffset)
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def add_pre2x4(self,i):
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if (self.num_inputs == 2):
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base = vector(0,0)
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mod_dir = vector(1,1)
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mirror = "RO"
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index_off1 = index_off2 = 0
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else:
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base= vector(self.pre2_4.width, i * self.pre2_4.height)
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mod_dir = vector(-1,1)
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mirror = "MY"
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index_off1 = i * 2
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index_off2 = i * 4
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pins = []
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for input_index in range(2):
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pins.append("A[{0}]".format(input_index + index_off1))
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for output_index in range(4):
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pins.append("out[{0}]".format(output_index + index_off2))
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pins = pins + ["vdd", "gnd"]
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self.add_inst(name="pre[{0}]".format(i),
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mod=self.pre2_4,
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offset=base,
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mirror=mirror)
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self.connect_inst(pins)
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vdd_offset = base + self.pre2_4.vdd_position.scale(mod_dir)
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self.pre_decoder_vdd_positions.append(vdd_offset)
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self.add_label(text="vdd",
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layer="metal1",
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offset=vdd_offset)
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gnd_offset = base + self.pre2_4.gnd_position.scale(mod_dir)
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self.pre_decoder_gnd_positions.append(gnd_offset)
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self.add_label(text="gnd",
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layer="metal1",
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offset=gnd_offset)
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def add_lables_pre2x4(self,i):
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pre2_4_base = i * self.pre2_4.height
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# ADDING LABELS FOR INPUT SIDE OF THE 2:4 PRE-DECODER
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if (self.num_inputs == 2):
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xoffset = self.pre2_4.x_off_inv_1
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else:
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xoffset = self.pre2_4.width - self.pre2_4.x_off_inv_1
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for inv_2x4 in range(2):
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if (inv_2x4 % 2 == 0):
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pin_y = self.inv.A_position.y
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else:
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pin_y = (self.inv.height - self.inv.A_position.y
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- drc["metal1_to_metal1"])
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yoffset = pre2_4_base + inv_2x4 * self.inv.height + pin_y
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self.add_label(text="A[{0}]".format(inv_2x4 + i * 2),
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layer="metal1",
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offset=[xoffset, yoffset])
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self.A_positions.append(vector(xoffset, yoffset))
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# ADDING LABELS FOR OUTPUT SIDE OF THE 2:4 PRE-DECODER
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for inv_2x4 in range(4):
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if (self.num_inputs == 2):
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xoffset = self.pre2_4.x_off_inv_2 + self.inv.Z_position.x
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else:
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xoffset = 0
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if (inv_2x4 % 2 == 0):
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pin_y = self.inv.Z_position.y
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else:
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pin_y = self.inv.height - self.inv.Z_position.y
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yoffset = pre2_4_base + inv_2x4 * self.inv.height + pin_y
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self.add_label(text="out[{0}]".format(inv_2x4 + i * 4),
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layer="metal1",
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offset=[xoffset, yoffset])
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def add_pre3x8(self,j):
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if (self.num_inputs == 3):
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offset = vector(0,0)
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mirror ="R0"
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mod_dir = vector(1,1)
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index_off1 = index_off2 = 0
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else:
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offset = vector(self.pre3_8.width,
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self.no_of_pre2x4 * self.pre2_4.height
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+ j * self.pre3_8.height)
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mirror="MY"
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mod_dir = vector(-1,1)
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index_off1 = j * 3 + self.no_of_pre2x4 * 2
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index_off2 = j * 8 + self.no_of_pre2x4 * 4
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pins = []
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for input_index in range(3):
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pins.append("A[{0}]".format(input_index + index_off1))
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for output_index in range(8):
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pins.append("out[{0}]".format(output_index + index_off2))
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pins = pins + ["vdd", "gnd"]
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self.add_inst(name="pre3x8[{0}]".format(j),
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mod=self.pre3_8,
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offset=offset,
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mirror=mirror)
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self.connect_inst(pins)
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vdd_offset = offset + self.pre3_8.vdd_position.scale(mod_dir)
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self.pre_decoder_vdd_positions.append(vdd_offset)
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self.add_label(text="vdd",
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layer="metal1",
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offset=vdd_offset)
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gnd_offset = offset + self.pre3_8.gnd_position.scale(mod_dir)
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self.pre_decoder_gnd_positions.append(gnd_offset)
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self.add_label(text="gnd",
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layer="metal1",
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offset=gnd_offset)
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return offset.y
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def add_lables_pre3x8(self,j,pre3x8_yoffset):
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# ADDING LABELS FOR INPUT SIDE OF THE 3:8 PRE-DECODER
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if (self.num_inputs == 3):
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xoffset = self.pre3_8.x_off_inv_1
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else:
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xoffset = self.pre3_8.width - self.pre3_8.x_off_inv_1
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for inv_3x8 in range(3):
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if (inv_3x8 % 2 == 0):
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pin_y = self.inv.A_position.y
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else:
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pin_y = (self.inv.height - self.inv.Z_position.y
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-drc["minwidth_metal1"])
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yoffset = pre3x8_yoffset + inv_3x8 * (self.inv.height) + pin_y
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A_index = self.no_of_pre2x4 * 2 + inv_3x8 + j * 3
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self.add_label(text="A[{0}]".format(A_index),
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layer="metal1",
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offset=[xoffset, yoffset])
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self.A_positions.append(vector(xoffset, yoffset))
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# ADDING LABELS FOR OUTPUT SIDE OF THE 3:8 PRE-DECODER
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for inv_3x8 in range(8):
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if (self.num_inputs == 3):
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xoffset = self.pre3_8.x_off_inv_2 + self.inv.Z_position.x
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else:
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xoffset = 0
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if (inv_3x8 % 2 == 0):
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pin_y = self.inv.Z_position.y
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else:
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pin_y = self.inv.height - self.inv.Z_position.y
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yoffset = pre3x8_yoffset + inv_3x8 * self.inv.height + pin_y
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out_index = self.no_of_pre2x4 * 4 + inv_3x8 + j * 8
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self.add_label(text="out[{0}]".format(out_index),
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layer="metal1",
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offset=[xoffset, yoffset])
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def create_row_decoder(self):
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# Create the row-decoder using NAND2/NAND3 and Inverter and places the
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# output labels [out/decode_out]
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if (self.num_inputs >= 4):
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self.add_decoder_nand_array_and_labels()
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self.add_decoder_inv_array_and_labels()
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def add_decoder_nand_array_and_labels(self):
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# Row Decoder NAND GATE array for address inputs <5.
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if (self.num_inputs == 4 or self.num_inputs == 5):
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nand = self.nand2
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correct = 0
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nand_name ="NAND2"
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self.add_nand_array(nand,correct,nand_name)
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# FIXME: Can we convert this to the connect_inst with checks?
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for i in range(self.group_sizes[0]):
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for j in range(self.group_sizes[1]):
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pins =["out[{0}]".format(i),
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"out[{0}]".format(j + self.group_sizes[0]),
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"Z[{0}]".format(self.group_sizes[1] * i + j),
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"vdd", "gnd"]
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self.connect_inst(args=pins, check=False)
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# Row Decoder NAND GATE array for address inputs >5.
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elif (self.num_inputs > 5):
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nand = self.nand3
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correct = drc["minwidth_metal1"]
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nand_name ="NAND3"
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self.add_nand_array(nand,correct,nand_name)
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# This will not check that the inst connections match.
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for i in range(self.group_sizes[0]):
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for j in range(self.group_sizes[1]):
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for k in range(self.group_sizes[2]):
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Z_index = (self.group_sizes[1] * self.group_sizes[2]* i
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+ self.group_sizes[2] * j + k)
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pins = ["out[{0}]".format(i),
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"out[{0}]".format(j + self.group_sizes[0]),
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"out[{0}]".format(k + self.group_sizes[0] + self.group_sizes[1]),
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"Z[{0}]".format(Z_index),
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"vdd", "gnd"]
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self.connect_inst(args=pins, check=False)
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def add_nand_array(self,nand,correct,nand_name):
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for row in range(self.rows):
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name = nand_name+"_[{0}]".format(row)
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if ((row % 2) == 0):
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y_off = self.predecoder_height + (nand.height) * (row)
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y_dir = 1
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mirror = "R0"
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else:
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y_off = self.predecoder_height + (nand.height) * (row + 1)
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y_dir = - 1
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mirror = "MX"
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self.add_inst(name=name,
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mod=nand,
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offset=[0, y_off],
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mirror=mirror)
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self.add_rect(layer="metal1",
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offset=[nand.width - correct,
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y_off + y_dir * (nand.Z_position.y-correct)],
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width=drc["minwidth_metal1"],
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height=y_dir * drc["minwidth_metal1"])
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def add_decoder_inv_array_and_labels(self):
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# Row Decoder INVERTER array insts.
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if (self.num_inputs == 4 or self.num_inputs == 5):
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x_off = self.nand2.width
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else:
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x_off = self.nand3.width
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for row in range(self.rows):
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name = "INVERTER_[{0}]".format(row)
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if ((row % 2) == 0):
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inv_row_height = self.inv.height * row
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mirror = "R0"
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else:
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inv_row_height = self.inv.height * (row + 1)
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mirror = "MX"
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y_off = self.predecoder_height + inv_row_height
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self.add_inst(name=name,
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mod=self.inv,
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offset=[x_off, y_off],
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mirror=mirror)
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# This will not check that the inst connections match.
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self.connect_inst(args=["Z[{0}]".format(row),
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"decode_out[{0}]".format(row),
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"vdd", "gnd"],
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check=False)
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|
|
# add vdd and gnd label
|
|
for row in range(self.rows):
|
|
if ((row % 2) == 0):
|
|
offset = vector(0, self.predecoder_height + row*(self.inv.height))
|
|
vdd_offset = offset + self.inv.vdd_position.scale(0,1)
|
|
gnd_offset = offset + self.inv.gnd_position.scale(0,1)
|
|
else:
|
|
offset = vector(0, self.predecoder_height + (row+1)*(self.inv.height))
|
|
vdd_offset = offset + self.inv.vdd_position.scale(0, -1)
|
|
gnd_offset = offset + self.inv.gnd_position.scale(0, -1)
|
|
self.vdd_positions.append(vdd_offset)
|
|
self.add_label(text="vdd",
|
|
layer="metal1",
|
|
offset=vdd_offset)
|
|
self.gnd_positions.append(gnd_offset)
|
|
self.add_label(text="gnd",
|
|
layer="metal1",
|
|
offset=gnd_offset)
|
|
|
|
# add output label for Row Decoder INVERTER array.
|
|
if (self.num_inputs == 4 or self.num_inputs == 5):
|
|
x_off = self.nand2.width + self.inv.Z_position.x
|
|
else:
|
|
x_off = self.nand3.width + self.inv.Z_position.x
|
|
|
|
for row in range(self.rows):
|
|
if ((row % 2) == 0):
|
|
pin_y = row * self.inv.height + self.inv.Z_position.y
|
|
else:
|
|
pin_y = (row+1)*self.inv.height - self.inv.Z_position.y
|
|
y_off = self.predecoder_height + pin_y
|
|
|
|
self.add_label(text="decode_out[{0}]".format(row),
|
|
layer="metal1",
|
|
offset=[x_off, y_off])
|
|
self.decode_out_positions.append(vector(x_off, y_off))
|
|
|
|
def create_vertical_rail(self):
|
|
# VERTICAL METAL RAILS TO CONNECT PREDECODER TO DECODE STAGE
|
|
if (self.num_inputs >= 4):
|
|
# Array for saving the X offsets of the vertical rails. These rail
|
|
# offsets are accessed with indices.
|
|
vertical_rail_x_offsets = []
|
|
for i in range(self.total_number_of_predecoder_outputs):
|
|
vertical_rail_x_offsets.append(-self.gap_between_rail_offset \
|
|
* (self.total_number_of_predecoder_outputs - i))
|
|
self.add_rect(layer="metal2",
|
|
offset=[-self.gap_between_rail_offset * (i + 1),
|
|
0],
|
|
width=drc["minwidth_metal2"],
|
|
height=self.height)
|
|
|
|
# Horizontal metal extensions from pre-decoder 2x4ouput.
|
|
for i in range(self.no_of_pre2x4):
|
|
self.extend_horizontal_to_pre2x4(i,vertical_rail_x_offsets)
|
|
|
|
# Horizontal metal extensions from pre-decoder 3x8 ouput.
|
|
for i in range(self.no_of_pre3x8):
|
|
self.extend_horizontal_to_pre3x8(i,vertical_rail_x_offsets)
|
|
|
|
self.connect_vertial_rails_to_decoder(vertical_rail_x_offsets)
|
|
|
|
def extend_horizontal_to_pre2x4(self, output_index, vertical_rail_x_offsets):
|
|
for inv_2x4 in range(4):
|
|
line_index = output_index * 4 + inv_2x4
|
|
current_inv_height = (output_index * self.pre2_4.height
|
|
+ inv_2x4 * (self.inv.height))
|
|
|
|
if (inv_2x4 % 2 == 0):
|
|
pin_y = self.inv.Z_position.y
|
|
else:
|
|
pin_y = (self.inv.height - drc["minwidth_metal1"]
|
|
- self.inv.Z_position.y)
|
|
yoffset = current_inv_height + pin_y
|
|
|
|
self.add_extend_rails(yoffset = yoffset,
|
|
xoffset = vertical_rail_x_offsets[line_index])
|
|
|
|
def extend_horizontal_to_pre3x8(self, output_index, vertical_rail_x_offsets):
|
|
for inv_3x8 in range(8):
|
|
line_index = output_index * 8 + inv_3x8 + self.no_of_pre2x4 * 4
|
|
current_inv_height = output_index * (self.pre3_8.height) \
|
|
+ inv_3x8 * (self.inv.height) \
|
|
+ self.no_of_pre2x4 * self.pre2_4.height
|
|
|
|
if (inv_3x8 % 2 == 0):
|
|
pin_y = self.inv.Z_position.y
|
|
else:
|
|
pin_y = (self.inv.height - drc["minwidth_metal1"]
|
|
- self.inv.Z_position.y)
|
|
yoffset = current_inv_height + pin_y
|
|
|
|
self.add_extend_rails(yoffset = yoffset,
|
|
xoffset = vertical_rail_x_offsets[line_index])
|
|
|
|
def connect_vertial_rails_to_decoder(self, vertical_rail_x_offsets):
|
|
# METAL CONNECTION FROM THE VERTICAL RAIL TOWARDS THE DECODER.
|
|
# PRE-DECODER OUTPUT ARE CONNECTED TO THIS SAME RAIL ALSO
|
|
# To makes these connections groups of line index that was stored in
|
|
# self.predecoder_output_groups are used
|
|
# Inputs of NAND2/NAND3 gates come from diffrent groups.
|
|
# For example for these groups [ [0,1,2,3] ,[4,5,6,7],
|
|
# [8,9,10,11,12,13,14,15] ] the first NAND3 inputs are connected to
|
|
# [0,4,8] and second NAND3 is connected to [0,4,9] ........... and the
|
|
# 128th NAND3 is connected to [3,7,15]
|
|
row_index = 0
|
|
if (self.num_inputs == 4 or self.num_inputs == 5):
|
|
for line_index_A in self.predecoder_output_groups[0]:
|
|
for line_index_B in self.predecoder_output_groups[1]:
|
|
|
|
current_inv_height = self.predecoder_height + row_index * (self.inv.height)
|
|
if (row_index % 2 == 0):
|
|
yoffset_A = current_inv_height + self.nand2.A_position.y
|
|
yoffset_B = current_inv_height + self.nand2.B_position.y
|
|
|
|
else:
|
|
base = current_inv_height + self.inv.height - drc["minwidth_metal1"]
|
|
yoffset_A = base - self.nand2.A_position.y
|
|
yoffset_B = base - self.nand2.B_position.y
|
|
|
|
row_index = row_index + 1
|
|
self.add_extend_rails(yoffset =yoffset_A,
|
|
xoffset =vertical_rail_x_offsets[line_index_A])
|
|
self.add_extend_rails(yoffset =yoffset_B,
|
|
xoffset =vertical_rail_x_offsets[line_index_B])
|
|
|
|
elif (self.num_inputs > 5):
|
|
for line_index_A in self.predecoder_output_groups[0]:
|
|
for line_index_B in self.predecoder_output_groups[1]:
|
|
for line_index_C in self.predecoder_output_groups[2]:
|
|
|
|
current_inv_height = self.predecoder_height + row_index * (self.inv.height)
|
|
|
|
if (row_index % 2 == 0):
|
|
yoffset_A = current_inv_height + self.nand3.A_position.y
|
|
yoffset_B = current_inv_height + self.nand3.B_position.y
|
|
yoffset_C = current_inv_height + self.nand3.C_position.y
|
|
contact_C_yoffset = yoffset_C - self.contact_shift
|
|
else:
|
|
base = current_inv_height + self.inv.height - drc["minwidth_metal1"]
|
|
yoffset_A = base - self.nand3.A_position.y
|
|
yoffset_B = base - self.nand3.B_position.y
|
|
yoffset_C = base - self.nand3.C_position.y
|
|
contact_C_yoffset = yoffset_C
|
|
|
|
row_index = row_index + 1
|
|
|
|
self.add_extend_rails(yoffset =yoffset_A,
|
|
xoffset =vertical_rail_x_offsets[line_index_A])
|
|
self.add_extend_rails(yoffset =yoffset_B,
|
|
xoffset =vertical_rail_x_offsets[line_index_B])
|
|
self.add_extend_rails(yoffset =yoffset_C,
|
|
xoffset =vertical_rail_x_offsets[line_index_C],
|
|
contact_yoffset = contact_C_yoffset)
|
|
|
|
def add_extend_rails(self, yoffset, xoffset, contact_yoffset=0):
|
|
self.add_rect(layer="metal1",
|
|
offset=[xoffset, yoffset],
|
|
width=-xoffset,
|
|
height=drc["minwidth_metal1"])
|
|
|
|
if contact_yoffset!=0:
|
|
yoffset = contact_yoffset
|
|
|
|
self.add_via(layers=("metal1", "via1", "metal2"),
|
|
offset=[xoffset + self.gap_between_rails,
|
|
yoffset - self.via_shift],
|
|
rotate=90)
|