Logo
Explore Help
Sign In
luke/OpenRAM
Watch 1
Star 0
Fork 0
mirror of https://github.com/VLSIDA/OpenRAM.git synced 2026-08-29 09:30:38 +02:00
Code Issues Packages Projects Releases Wiki Activity
Files
e6a7ecae84aea56fed390c801b02a306bdc3ca62
OpenRAM/compiler/verify
T
History
mrg e6a7ecae84 Fix missing default path in pex
2020-11-12 14:43:57 -08:00
..
__init__.py
Temp comment Magic GDS filter code.
2020-11-10 13:37:18 -08:00
assura.py
Output DRC and LVS run files to output directory.
2020-11-09 11:12:31 -08:00
calibre.py
Use readspice to define ports from sp netlist in Magic extract.
2020-11-10 17:06:24 -08:00
magic.py
Fix missing default path in pex
2020-11-12 14:43:57 -08:00
none.py
Use readspice to define ports from sp netlist in Magic extract.
2020-11-10 17:06:24 -08:00
run_script.py
Output DRC and LVS run files to output directory.
2020-11-09 11:12:31 -08:00
Powered by Gitea Version: 1.27.2 Page: 517ms Template: 1ms
Auto
English
Bahasa Indonesia Deutsch English Español Français Gaeilge Italiano Latviešu Magyar nyelv Nederlands Polski Português de Portugal Português do Brasil Suomi Svenska Türkçe Čeština Ελληνικά Български Русский Українська فارسی മലയാളം 日本語 简体中文 繁體中文(台灣) 繁體中文(香港) 한국어
Licenses API