mirror of
https://github.com/VLSIDA/OpenRAM.git
synced 2026-08-29 01:24:39 +02:00
this is technology specific database to store data about the custom design cells. For now it only contains on which axis the bitcells are mirrored. This is a first step to support thin cells that need to be mirrored on the x and y axis. Signed-off-by: Bastian Koppelmann <[email protected]>