mirror of https://github.com/VLSIDA/OpenRAM.git
72 lines
1.5 KiB
Makefile
72 lines
1.5 KiB
Makefile
TECH = scn4m_subm
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CUR_DIR = $(shell pwd)
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TEST_DIR = ${CUR_DIR}/tests
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MAKEFLAGS += -j 1
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# Library test
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LIBRARY_TESTS = $(shell find ${TEST_DIR} -name 0[1-2]*_test.py)
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# Technology and DRC tests (along with ptx)
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TECH_TESTS = $(shell find ${TEST_DIR} -name 03*_test.py)
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# Parameterized cells
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CELL_TESTS = $(shell find ${TEST_DIR} -name 04*_test.py)
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# Dynamically generated modules and arrays
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MODULE_TESTS = $(shell find ${TEST_DIR} -name 0[5-9]*_test.py)\
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$(shell find ${TEST_DIR} -name 1*_test.py)
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# Top-level SRAM configurations
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TOP_TESTS = $(shell find ${TEST_DIR} -name 20*_test.py)
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# All simulation tests.
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CHAR_TESTS = $(shell find ${TEST_DIR} -name 2[1-2]*_test.py)
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# Keep the model lib test here since it is fast
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# and doesn't need simulation.
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USAGE_TESTS = $(shell find ${TEST_DIR} -name 2[3-9]*_test.py)\
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$(shell find ${TEST_DIR} -name 30*_test.py)
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ALL_TESTS = \
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${LIBRARY_TESTS} \
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${TECH_TESTS} \
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${CELL_TESTS} \
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${MODULE_TESTS} \
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${TOP_TESTS} \
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${CHAR_TESTS} \
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${USAGE_TESTS}
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.PHONY: ${ALL_TESTS}
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all: ${ALL_TESTS}
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# Library tests
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lib: ${LIBRARY_TESTS}
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# Transistor and wire tests
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tech: ${TECH_TESTS}
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# Dynamically generated cells
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cell: ${CELL_TESTS}
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# Dynamically generated modules
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module: ${MODULE_TESTS}
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# Top level SRAM tests
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top: ${TOP_TESTS}
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# Timing and characterization tests
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char: ${CHAR_TESTS}
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# Usage and file generation
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usage: ${USAGE_TESTS}
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$(ALL_TESTS):
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python3 $@ -t ${TECH}
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clean:
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find . -name \*.pyc -exec rm {} \;
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find . -name \*~ -exec rm {} \;
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