mirror of https://github.com/VLSIDA/OpenRAM.git
231 lines
8.7 KiB
Python
231 lines
8.7 KiB
Python
# See LICENSE for licensing information.
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#
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# Copyright (c) 2016-2019 Regents of the University of California and The Board
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# of Regents for the Oklahoma Agricultural and Mechanical College
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# (acting for and on behalf of Oklahoma State University)
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# All rights reserved.
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#
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import debug
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import design
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import contact
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from vector import vector
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from sram_factory import factory
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from globals import OPTS
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class wordline_driver(design.design):
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"""
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Creates a Wordline Driver
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Generates the wordline-driver to drive the bitcell
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"""
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def __init__(self, name, rows, cols):
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design.design.__init__(self, name)
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debug.info(1, "Creating {0}".format(self.name))
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self.add_comment("rows: {0} cols: {1}".format(rows, cols))
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self.rows = rows
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self.cols = cols
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self.create_netlist()
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if not OPTS.netlist_only:
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self.create_layout()
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def create_netlist(self):
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self.add_modules()
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self.add_pins()
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self.create_drivers()
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def create_layout(self):
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self.place_drivers()
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self.route_layout()
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self.route_vdd_gnd()
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self.offset_all_coordinates()
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self.add_boundary()
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self.DRC_LVS()
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def add_pins(self):
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# inputs to wordline_driver.
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for i in range(self.rows):
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self.add_pin("in_{0}".format(i), "INPUT")
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# Outputs from wordline_driver.
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for i in range(self.rows):
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self.add_pin("wl_{0}".format(i), "OUTPUT")
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self.add_pin("en", "INPUT")
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self.add_pin("vdd", "POWER")
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self.add_pin("gnd", "GROUND")
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def add_modules(self):
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self.inv = factory.create(module_type="pdriver",
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fanout=self.cols,
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neg_polarity=True)
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self.add_mod(self.inv)
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self.nand2 = factory.create(module_type="pnand2")
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self.add_mod(self.nand2)
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def route_vdd_gnd(self):
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"""
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Add a pin for each row of vdd/gnd which
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are must-connects next level up.
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"""
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# Find the x offsets for where the vias/pins should be placed
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a_xoffset = self.nand_inst[0].rx()
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b_xoffset = self.inv2_inst[0].lx()
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for num in range(self.rows):
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# this will result in duplicate polygons for rails, but who cares
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# use the inverter offset even though it will be the nand's too
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(gate_offset, y_dir) = self.get_gate_offset(0,
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self.inv.height,
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num)
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# Route both supplies
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for name in ["vdd", "gnd"]:
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supply_pin = self.inv2_inst[num].get_pin(name)
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# Add pins in two locations
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for xoffset in [a_xoffset, b_xoffset]:
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pin_pos = vector(xoffset, supply_pin.cy())
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self.add_power_pin(name, pin_pos)
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def create_drivers(self):
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self.nand_inst = []
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self.inv2_inst = []
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for row in range(self.rows):
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name_nand = "wl_driver_nand{}".format(row)
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name_inv2 = "wl_driver_inv{}".format(row)
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# add nand 2
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self.nand_inst.append(self.add_inst(name=name_nand,
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mod=self.nand2))
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self.connect_inst(["en",
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"in_{0}".format(row),
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"wl_bar_{0}".format(row),
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"vdd", "gnd"])
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# add inv2
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self.inv2_inst.append(self.add_inst(name=name_inv2,
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mod=self.inv))
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self.connect_inst(["wl_bar_{0}".format(row),
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"wl_{0}".format(row),
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"vdd", "gnd"])
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def place_drivers(self):
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nand2_xoffset = 2*self.m1_width + 5*self.m1_space
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inv2_xoffset = nand2_xoffset + self.nand2.width
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self.width = inv2_xoffset + self.inv.width
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self.height = self.inv.height * self.rows
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for row in range(self.rows):
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if (row % 2):
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y_offset = self.inv.height*(row + 1)
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inst_mirror = "MX"
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else:
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y_offset = self.inv.height*row
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inst_mirror = "R0"
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nand2_offset = [nand2_xoffset, y_offset]
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inv2_offset = [inv2_xoffset, y_offset]
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# add nand 2
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self.nand_inst[row].place(offset=nand2_offset,
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mirror=inst_mirror)
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# add inv2
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self.inv2_inst[row].place(offset=inv2_offset,
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mirror=inst_mirror)
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def route_layout(self):
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""" Route all of the signals """
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# Wordline enable connection
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en_offset = [self.m1_width + 2 * self.m1_space, 0]
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en_pin = self.add_layout_pin(text="en",
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layer="m2",
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offset=en_offset,
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width=self.m2_width,
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height=self.height)
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for row in range(self.rows):
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nand_inst = self.nand_inst[row]
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inv2_inst = self.inv2_inst[row]
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# en connection
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a_pin = nand_inst.get_pin("A")
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a_pos = a_pin.lc()
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clk_offset = vector(en_pin.bc().x, a_pos.y)
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self.add_segment_center(layer="m1",
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start=clk_offset,
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end=a_pos)
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self.add_via_center(layers=self.m1_stack,
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offset=clk_offset)
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# Nand2 out to 2nd inv
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zr_pos = nand_inst.get_pin("Z").rc()
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al_pos = inv2_inst.get_pin("A").lc()
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# ensure the bend is in the middle
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mid1_pos = vector(0.5*(zr_pos.x+al_pos.x), zr_pos.y)
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mid2_pos = vector(0.5*(zr_pos.x+al_pos.x), al_pos.y)
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self.add_path("m1", [zr_pos, mid1_pos, mid2_pos, al_pos])
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# connect the decoder input pin to nand2 B
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b_pin = nand_inst.get_pin("B")
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b_pos = b_pin.lc()
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# needs to move down since B nand input is
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# nearly aligned with A inv input
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up_or_down = self.m2_space if row % 2 else -self.m2_space
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input_offset = vector(0, b_pos.y + up_or_down)
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base_offset = vector(clk_offset.x, input_offset.y)
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contact_offset = vector(0.5 * self.m2_width + self.m2_space + 0.5 * contact.m1m2.width, 0)
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mid_via_offset = base_offset + contact_offset
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# must under the clk line in M1
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self.add_layout_pin_segment_center(text="in_{0}".format(row),
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layer="m1",
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start=input_offset,
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end=mid_via_offset)
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self.add_via_center(layers=self.m1_stack,
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offset=mid_via_offset,
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directions=("V", "V"))
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# now connect to the nand2 B
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self.add_path("m2", [mid_via_offset, b_pos])
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contact_offset = b_pos - vector(0.5 * contact.m1m2.height, 0)
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self.add_via_center(layers=self.m1_stack,
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offset=contact_offset,
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directions=("H", "H"))
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# output each WL on the right
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wl_offset = inv2_inst.get_pin("Z").rc()
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self.add_layout_pin_segment_center(text="wl_{0}".format(row),
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layer="m1",
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start=wl_offset,
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end=wl_offset - vector(self.m1_width, 0))
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def determine_wordline_stage_efforts(self, external_cout, inp_is_rise=True):
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"""
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Follows the clk_buf to a wordline signal adding
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each stages stage effort to a list.
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"""
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stage_effort_list = []
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stage1_cout = self.inv.get_cin()
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stage1 = self.nand2.get_stage_effort(stage1_cout, inp_is_rise)
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stage_effort_list.append(stage1)
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last_stage_is_rise = stage1.is_rise
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stage2 = self.inv.get_stage_efforts(external_cout, last_stage_is_rise)
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stage_effort_list.extend(stage2)
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return stage_effort_list
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def get_wl_en_cin(self):
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"""
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Get the relative capacitance of all
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the enable connections in the bank
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"""
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# The enable is connected to a nand2 for every row.
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total_cin = self.nand2.get_cin() * self.rows
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return total_cin
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